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Freescale (Motorola)
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| Part No. |
MC88LV915T
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| OCR Text |
.../2 into a high impedance state (3state). after the oe /rst pin goes back high q0q4, q5 and q/2 will be reset in the low state, with 2x_q being the inverse of the selected sync input. assuming pll_en is low, the outputs will remain reset u... |
| Description |
LOW SKEW CMOS PLL CLOCK DRIVER
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| File Size |
289.35K /
12 Page |
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Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
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| Part No. |
74ACTQ16540 74ACTQ16540MTD 74ACTQ16540SSC 74ACTQ16540SSCX
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| OCR Text |
... sixteen inverting buffers with 3state outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which c... |
| Description |
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
20 Characters x 4 Lines, 5x7 Dot Matrix Character and Cursor ACT SERIES, DUAL 8-BIT DRIVER, INVERTED OUTPUT, PDSO48
GTLP-to-LVTTL 1-to-6 Fanout Driver 24-TSSOP -40 to 85 ACT SERIES, DUAL 8-BIT DRIVER, INVERTED OUTPUT, PDSO48
Dual 8-Bit Buffer/Driver ACT SERIES, DUAL 8-BIT DRIVER, INVERTED OUTPUT, PDSO48
From old datasheet system
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| File Size |
84.19K /
7 Page |
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it Online |
Download Datasheet |
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FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
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| Part No. |
74VCX16721MTD 74VCX16721 74VCX16721MEA
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| OCR Text |
...s twenty D-type flip-flops with 3state standard outputs. The twenty flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-HIGH Clock (CLK) transition, when the Clock-Enab... |
| Description |
Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
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| File Size |
59.24K /
7 Page |
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it Online |
Download Datasheet |
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Price and Availability
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