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TI store
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| Part No. |
DS90CR486VS/NOPB DS90CR486VSX/NOPB
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| OCR Text |
...he ds90cr484. 48 bits of lvcmos/lvttl data. using a 133mhz the chipset is an ideal solution to solve emi and clock, the data throughput is 6.384gbit/s interconnect size problems for high-throughput point- (798mbytes/s). to-point application... |
| Description |
<font color=red>[Old version datasheet]</font> 133MHz 48-Bit Channel Link Deserializer (6.384 Gbps)
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| File Size |
1,317.00K /
22 Page |
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Integrated Device Techn...
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| Part No. |
8545AG-01LFT
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| OCR Text |
lvttl-to-lvds fanout buffer 8545-01 8545-01 rev a 7/10/15 1 ?2015 integrated device technology, inc. description the 8545-01 is a low skew, high performance 1-to-4 lvcmos/lvttl-to-lvds clock fanout buffer. utilizing low voltage differen... |
| Description |
LVCMOS/lvttl-to-LVDS Fanout Buffer
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| File Size |
182.58K /
13 Page |
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Samsung Electronic
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| Part No. |
K4S161622E-TC/I/E
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| OCR Text |
lvttl samsung electronics reserves the right to change products or specification without notice.
k4s161622e cmos sdram rev 0.0 mar. '01 the k4s161622e is 16,777,216 bits synchronous high data rate dynamic ram organized as 2 x 524,288 wo... |
| Description |
512K x 16Bit x 2 Banks Synchronous DRAM Data Sheet
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| File Size |
658.98K /
42 Page |
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Mosel Vitelic Corp
Mosel Vitelic, Corp.
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| Part No. |
V54C3128804VS V54C3128404VS V54C3128804VT
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| OCR Text |
...all soc bga and 54 pin tsopii lvttl interface single +3.3 v 0.3 v power supply description the v54c3128(16/80/40)4v(t/s) is a four bank...to 166 mhz by employ- ing a chip architecture that prefetches multiple bits and then synchronizes th... |
| Description |
128Mbit SDRAM 3.3 VOLT/ TSOP II / SOC PACKAGE 8M X 16/ 16M X 8/ 32M X 4
128Mbit SDRAM 3.3 VOLT, TSOP II / SOC PACKAGE 8M X 16, 16M X 8, 32M X 4 128Mbit SDRAM.3伏，第二的TSOP / SOC的包米1616米x 82 × 4
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| File Size |
594.32K /
49 Page |
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Mosel Vitelic, Corp.
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| Part No. |
V43648S04VTG-10PC
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| OCR Text |
...h n all inputs, outputs are lvttl compatible n 4096 refresh cycles every 64 ms n serial present detect (spd) n sdram perform...to back random column address t ccd = 1 clk 01 16 burst length supported 1, 2, 4, 8 & full page... |
| Description |
3.3 Volt 8M x 64 High Performance PC100 SDRAM Module with Unbuffered(3.3V 8M*64位高性能无缓冲器PC100 SDRAM模块)
3.3 Volt 8M x 64 High Performance PC100 SDRAM Module with Unbuffered(3.3V 8M*64浣???ц?????插?PC100 SDRAM妯″?)
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| File Size |
68.70K /
10 Page |
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