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Cypress Semiconductor, Corp.
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Part No. |
CY7C1423AV18-300BZI CY7C1423AV18-200BZI CY7C1429AV18-200BZXI CY7C1429AV18-278BZXI CY7C1429AV18-250BZXI CY7C1423AV18-200BZC CY7C1423AV18-278BZI CY7C1423AV18-250BZI CY7C1423AV18-300BZXC CY7C1423AV18-200BZXC CY7C1422AV18-278BZC CY7C1422AV18-167BZXI CY7C1424AV18-200BZXI
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OCR Text |
...ely eliminate the need to ?turn-aro und? the data bus required with common io devices. access to each port is accomplished through a common address bus. addresses for read and write are latched on alternate rising edges of the input (k) c... |
Description |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.5 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 1M X 36 DDR SRAM, 0.45 ns, PBGA165
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File Size |
434.33K /
31 Page |
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it Online |
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Cypress Semiconductor, Corp.
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Part No. |
CY7C1423BV18-200BZI CY7C1423BV18-300BZI CY7C1429BV18-278BZI CY7C1429BV18-250BZI CY7C1429BV18-278BZC CY7C1429BV18-250BZC CY7C1429BV18-300BZI CY7C1422BV18-200BZXI CY7C1422BV18-167BZXC CY7C1422BV18-200BZXC CY7C1423BV18-200BZC CY7C1423BV18-278BZI CY7C1423BV18-250BZI CY7C1424BV18-278BZI CY7C1424BV18-278BZXC CY7C1423BV18-200BZXC CY7C1422BV18-250BZXI CY7C1424BV18-250BZXC
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OCR Text |
...ely eliminate the need to ?turn-aro und? the data bus required with common io devices. access to each port is accomplished through a common address bus. addresses for read and write are latched on alternate rising edges of the input (k) c... |
Description |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.5 ns, PBGA165 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 1M X 36 DDR SRAM, 0.45 ns, PBGA165
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File Size |
433.13K /
30 Page |
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it Online |
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Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
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Part No. |
CY7C1515AV18-200BZXI CY7C1526AV18-278BZXC CY7C1526AV18-250BZI CY7C1526AV18-300BZI CY7C1526AV18-250BZXI
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OCR Text |
...ely eliminate the need to ?turn-aro und? the data bus that exists with common io devices. each port can be accessed through a common address bus. addresses for read and write addresses are latched on alternate rising edges of the input (k) ... |
Description |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165 8M X 9 QDR SRAM, 0.45 ns, PBGA165
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File Size |
485.08K /
31 Page |
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it Online |
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Cypress Semiconductor, Corp.
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Part No. |
CY7C1529AV18-200BZXI CY7C1529AV18-250BZXI
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OCR Text |
...ely eliminate the need to ?turn-aro und? the data bus required with common io devices. access to each port is accomplished through a common address bus. addresses for read and write are latched on alternate rising edges of the input (k) c... |
Description |
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 8M X 9 DDR SRAM, 0.45 ns, PBGA165
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File Size |
461.80K /
30 Page |
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it Online |
Download Datasheet
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Cypress Semiconductor, Corp.
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Part No. |
CY7C1992BV18-167BZXC CY7C1992BV18-300BZC CY7C1992BV18-300BZXC
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OCR Text |
...ely eliminate the need to ?turn-aro und? the data bus required with common io devices. access to each port is accomplished through a common address bus. addresses for read and write are latched on alternate rising edges of the input (k) c... |
Description |
18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 9 DDR SRAM, 0.5 ns, PBGA165 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 9 DDR SRAM, 0.45 ns, PBGA165
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File Size |
420.02K /
31 Page |
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it Online |
Download Datasheet
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Price and Availability
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