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IDT
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| Part No. |
IDT72T20108 IDT72T2098 IDT72T20128
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| OCR Text |
...CONTROL (BOUNDARY SCAN)
RCLK ren RCS
HSTL I/0 CONTROL
OE
Eren
5996 drw01
Q0 -Qn (x20, x10)
ERCLK
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The TeraSync is a trademark of Int... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
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| File Size |
459.34K /
51 Page |
 View
it Online |
Download Datasheet
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MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
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| Part No. |
MAX9206 MAX9208 MAX9208EAI MAX9206EAI
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| OCR Text |
...MING AND CONTROL CLOCK RECOVERY ren LOCK RCLK RCLK_R/F
PLL SYNC 1 SYNC 2
TIMING AND CONTROL
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering info... |
| Description |
10-Bit Bus LVDS Deserializers
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| File Size |
176.14K /
12 Page |
View
it Online |
Download Datasheet |
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Cypress
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| Part No. |
CY7C4265V CY7C4275V CY7C4255V CY7C4285V 7C4285V
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| OCR Text |
...k (RCLK) and a read enable pin (ren). In addition, the CY7C4255/65/75/85V have an output enable pin (OE). The read and write clocks may be tied together for single-clock operation or the two clocks may be run independently for asynchronous ... |
| Description |
32K/64Kx18 Low Voltage Deep Sync FIFOs
From old datasheet system
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| File Size |
273.36K /
19 Page |
View
it Online |
Download Datasheet |
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Cypress
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| Part No. |
CY7C4265 CY7C4255 7C4255
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| OCR Text |
...k (RCLK) and a read enable pin (ren). In addition, the CY7C4255/65 have an output enable pin (OE). The read and write clocks may be tied together for single-clock operation or the two clocks may be run independently for asynchronous read/wr... |
| Description |
8K/16Kx18 Deep Sync FIFOs
From old datasheet system
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| File Size |
384.73K /
21 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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