|
|
 |

Altera Corporation
|
Part No. |
EP910I EP1810 EP910 EP610 EP610I EP910LC-30
|
OCR Text |
...ors Additional design entry and simulation support provided by EDIF, library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, O... |
Description |
CPLD, EP910 Family, ECMOS Process, 450 Gates, 24 Macro Cells, 24 Reg., 24 User I/Os, 5V Supply, 30 Speed Grade, 44LDCC The Altera Classic device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology
|
File Size |
293.93K /
42 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|