|
|
|
Cypress Semiconductor, Corp.
|
Part No. |
CY8C23533-24LQXI
|
OCR Text |
...hz, providing a four million in structions per second mips 8-bit harvard-architecture microprocessor. the cpu uses an interrupt controller with 11 ve ctors, to simplify programming of real time embedded events. program execution is timed an... |
Description |
PSoC® Mixed-Signal Array MULTIFUNCTION PERIPHERAL, QCC32
|
File Size |
597.73K /
52 Page |
View
it Online |
Download Datasheet |
|
|
|
Intel, Corp.
|
Part No. |
80C196KB
|
OCR Text |
...emporary registers for many in- structions. repetitive shifts are counted by the 6-bit ``loop counter''. a third temporary register stores the second operand of two operand instructions. this includes the multiplier during multiplications a... |
Description |
High Performance Microcontrollers With a 16-Bit CPU and at Least 230 Bytes of On Chip RAM(高性能16位微控制片内有至30字节RAM)) 高性能16位CPU和微控制器至少有230字节的片上内存(高性能16位微控制器(片内有至30字节的RAM))
|
File Size |
990.21K /
98 Page |
View
it Online |
Download Datasheet |
|
|
|
ST Microelectronics
|
Part No. |
ST10R172LER
|
OCR Text |
... be ignored, and no further in- structions are fetched from external memory, i.e. the cpu is in a quasi-idle state. this prob- lem will only occur in the following situations: 1) the instructions following the pwrdn instruction are located ... |
Description |
16-BIT LOW VOLTAGE ROMLESS MCU (ERRATA SHEET)
|
File Size |
19.53K /
3 Page |
View
it Online |
Download Datasheet |
|
|
|
Fujitsu Media Devices
|
Part No. |
MB91F312A
|
OCR Text |
...ultiple-register load/store in- structions ? register interlock functions: facilitating coding in assemblers ? on-chip multiplier supported at the instruction level. signed 32-bit multiplication: 5 cycles. signed 16-bit multiplication: 3 ... |
Description |
(MB91F312A / MB91FV310A) Proprietary 32-bit Microcontroller CMOS
|
File Size |
548.72K /
59 Page |
View
it Online |
Download Datasheet |
|
|
|
SGS Thomson Microelectronics
|
Part No. |
M95040-W4 M95010-W4 M95020-W4 M95010-S4 M95020-S4 M95040-S4
|
OCR Text |
...s set and reset by specific in- structions. when reset to 0, no write or wrsr instructions are accepted by the device. bp1, bp0 bits. the block protect bits are non- volatile read-write bits. these bits define the area of memory that is pro... |
Description |
4/2/1 KBIT SERIAL SPI BUS EEPROM WITH HIGH SPEED CLOCK
|
File Size |
201.40K /
32 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|