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2SC28 2SC3365 ELECT AX3015B FAN3224 E1300 MINISM CSC3420
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  buffer divider. Datasheet PDF File

For buffer divider. Found Datasheets File :: 3892    Search Time::3.5ms    
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    MAX3624A MAX3624AETJ

Maxim Integrated Products
Part No. MAX3624A MAX3624AETJ
OCR Text ...PASS SELA[1:0] QAC_OE LVCMOS buffer RESET LOGIC/POR RESET DIVIDER NA LVPECL buffer QA_C SELA[1:0] SELB[1:0] FB_SEL[1:0] BYPASS QA_OE QA QA RESET LVCMOS REF_IN 27pF X_IN CRYSTAL OSCILLATOR X_OUT 33pF DIVIDERS: M = 16, 24, 25, ...
Description Low-Jitter, Precision Clock Generator with Four Outputs

File Size 381.60K  /  12 Page

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    CY23FP12-002 CY3692 CY23FP12OC-002 CY23FP12OC-002T CY23FP12OI-002 CY23FP12OI-002T

Cypress Semiconductor, Corp.
Part No. CY23FP12-002 CY3692 CY23FP12OC-002 CY23FP12OC-002T CY23FP12OI-002 CY23FP12OI-002T
OCR Text buffer Features * Pre-programmed Configurations * Fully field-programmable -- Input and output dividers -- Inverting/noninverting outputs ...divider -M. The divider can be any integer value See from 1 to 256; however, the PLL input frequency...
Description 23FP SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 5.30 MM, SSOP-28
200-MHz Field Programmable Zero Delay buffer

File Size 207.98K  /  10 Page

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    MAX3625A MAX3625ACUG

Maxim Integrated Products
Part No. MAX3625A MAX3625ACUG
OCR Text ...GIC/POR RESET DIVIDER NA LVPECL buffer QA QA RESET LVCMOS REF_IN 27pF X_IN CRYSTAL OSCILLATOR X_OUT 33pF DIVIDERS: M = 24, 25 NA = 10, 2, 4, 5 NB = 10, 2, 4, 5 LVPECL buffer QB0 QB0 DIVIDER M DIVIDER NB 1 0 PFD FILTER RESET 620MHz TO 648...
Description Low-Jitter, Precision Clock Generator with Three Outputs

File Size 295.51K  /  10 Page

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    MAX3625B MAX3625BEUG

Maxim Integrated Products
Part No. MAX3625B MAX3625BEUG
OCR Text ...GIC/POR RESET DIVIDER NA LVPECL buffer QA QA RESET LVCMOS REF_IN 27pF X_IN CRYSTAL OSCILLATOR X_OUT 33pF DIVIDERS: M = 24, 25 NA = 10, 2, 4, 5 NB = 10, 2, 4, 5 LVPECL buffer QB0 QB0 DIVIDER M DIVIDER NB 1 0 PFD FILTER RESET 620MHz TO 648...
Description Low-Jitter, Precision Clock Generator with Three Outputs

File Size 296.26K  /  10 Page

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    PL611-23XXXDC PL611-23XXXDI PL623-38

PLL[PhaseLink Corporation]
Part No. PL611-23XXXDC PL611-23XXXDI PL623-38
OCR Text ...tion. GND connection for output buffer circuitry. GND connection for output buffer circuitry. PECL output. Complementary PECL output. VDD co...Divider Selector pin as presented on the DIVIDER SELECTOR TABLE on page `1'. Output Divider Selector...
Description Low Phase Noise XO (for 3rd O.T.) For 65-130MHz

File Size 210.68K  /  6 Page

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    RF249807 RF2498PCBA RF2498

RFMD[RF Micro Devices]
Part No. RF249807 RF2498PCBA RF2498
OCR Text ...tegrated. There is also a TX LO buffer. The design is flexible, in that the bias currents may be set using off-chip current reference resist...Divider enabled or disabled. NOTE 3. LO Divider disabled. LO Divider disabled logic conditions: A) B...
Description TRI-BAND/QUAD-MODE CDMA/GPS LOW NOISE AMPLIFIER/MIXER

File Size 679.14K  /  20 Page

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