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ICS
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| Part No. |
ICS843002-31
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| OCR Text |
...k Example Applications: * SONET/SDH line card clock generator (up to 622.08MHz for OC-48) using 8kHz frame clock as input reference * Jitter attenuation of a recovered communications clock * Complex-ratio clock frequency translation between... |
| Description |
700MHz, FemtoClock? VCXO Based Frequency Translator and Jitter Attenuator
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| File Size |
276.08K /
24 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS843002I-40 ICS43002A40 ICS843002AKI-40 ICS843002AKI-40T
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| OCR Text |
SDH JITTER ATTENUATOR
FEATURES
* (2) Differential LVPECL outputs * Selectable CLKx, nCLKx differential input pairs * CLKx, nCLKx pairs can...OC-48 (SONET) or STM-16 (SDH). The VCXO requires the use of an external, inexpensive pullable crysta... |
| Description |
175MHZ, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR
175MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
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| File Size |
262.31K /
21 Page |
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ICS
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| Part No. |
ICS843002I-41
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| OCR Text |
SDH JITTER ATTENUATOR
FEATURES
* (2) Differential LVPECL outputs * Selectable CLKx, nCLKx differential input pairs * CLKx, nCLKx pairs can...OC-48 (SONET) or STM-16 (SDH). The VCXO requires the use of an external, inexpensive pullable crysta... |
| Description |
700MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
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| File Size |
274.06K /
21 Page |
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it Online |
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ICS
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| Part No. |
M2004-X1
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| OCR Text |
...ut the M2004-01 to ensure SONET/SDH MTIE and TDEV compliance during reference clock reselection * Fixed Narrow Loop Bandwidth feature (Fixed...OC-12 / 48 /192
Table 1: Example Input / Output Frequency Combinations
Device Variants and Cor... |
| Description |
SAW PLL Frequency Translation Family with Hitless Switching options
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| File Size |
73.58K /
1 Page |
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ICS
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| Part No. |
M2004-X2
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| OCR Text |
...ut the M2004-02 to ensure SONET/SDH MTIE and TDEV compliance during reference clock reselection * Fixed Narrow Loop Bandwidth feature (Fixed...OC-12 / 48 /192
Table 1: Example Input / Output Frequency Combinations
Device Variants and Cor... |
| Description |
SAW PLL Frequency Translation Family with Hitless Switching options
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| File Size |
70.22K /
1 Page |
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ICS
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| Part No. |
M2004-X3
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| OCR Text |
...04-24 to enable SONET (GR-253) /SDH (G.813) MTIE and TDEV compliance during reference clock reselection * Reference clock inputs support sin...OC-12 / 48 /192
Device Variants and Corresponding Functions
Variant M2004-03 M2004-13 M2004-23 H... |
| Description |
SAW PLL Frequency Translation Family with Loss of Lock indicator and Hitless Switching options
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| File Size |
65.43K /
1 Page |
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ICS
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| Part No. |
M2004-X4
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| OCR Text |
...14 and M2004-24 to ensure SONET/SDH MTIE and TDEV compliance during reference clock reselection * Differential LVPECL output * Reference clo...OC-12 / 48 /192 Application
Table 1: Example Input / Output Frequency Combinations
* Series co... |
| Description |
SAW PLL Frequency Translation Family with Loss of Lock indicator and Hitless Switching options
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| File Size |
69.65K /
1 Page |
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pmc
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| Part No. |
1990887
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| OCR Text |
...ference Design provides a SONET/SDH network with T1, E1, E3 or DS3 access to an ATM Adaptation Layer One (AAL1) Constant Bit Rate (CBR) ATM ...OC-3 capacity, scaleable to OC-12. Supports T1, E1, E3, and DS3 rates in channelized and unchanneliz... |
| Description |
From old datasheet system
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| File Size |
1,560.77K /
94 Page |
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pmc
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| Part No. |
1991722
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| OCR Text |
...bit/s ATM and Packet-Over-SONET/SDH Physical Layer Device
FEATURES
* Single channel ATM and Packet-overSONET OC-3c (155 Mbit/s) PHY. * Provides on-chip clock and data recovery and clock synthesis. * Exceeds Bellcore-GR-253 jitter requirem... |
| Description |
From old datasheet system
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| File Size |
99.64K /
2 Page |
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it Online |
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Price and Availability
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