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Integrated Device Technology, Inc. ICS Integrated Circuit Systems
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Part No. |
ICS9248-195 ICS9248YF-195LF-T ICS9248YG-195LF-T ICS9248YF-195-T
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OCR Text |
...e a f t e r t h e p i n i s a n asynchronous active low power down pin. asynchronous active low input pin used to power down the device into...latched Input. 48MHz output clock Frequency select pin. latched Input Power for 24 & 48MHz output bu... |
Description |
140 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, MO-118, SSOP-48 140 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, LEAD FREE, MO-118, SSOP-48 Clock Synthesizer Frequency Generator & Integrated Buffers for PENTIUM II/III & K6
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File Size |
144.93K /
16 Page |
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Samsung Electronic
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Part No. |
KFG5616D1M-DEB KFG5616Q1M-DEB KFG5616U1M-DIB
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OCR Text |
...agrams 4. added and revised the asynchronous read operation timing diagram 5. revised the asynchronous write operation timing diagram 6. add...latched on the we pulse?s rising edge avd i address valid detect indicates valid address presence... |
Description |
OneNAND256
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File Size |
1,218.05K /
93 Page |
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Integrated Device Technology, Inc. ICS
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Part No. |
ICS9248-172 ICS9248YF-172LF-T
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OCR Text |
... esktop M ode, 0=M obile M ode. asynchronous active low input pin used to power down the device into a low pow er state. The internal clocks...latched at internal power-on-reset. Use 10Kohm resistor to program logic Hi to VDD or GND for logic ... |
Description |
133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48 Single Chip, System Clock for PIII/1651 Chipset up to 147MHz; SDRAM Clocks
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File Size |
317.16K /
16 Page |
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Atmel
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Part No. |
AT49BV6416C
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OCR Text |
asynchronous access time ? 70 ns ? page mode read time ? 20 ns sector erase architecture ? eight 4k word sectors with individual write loc...latched on the first rising edge of the we or ce . valid data is latched on the rising edge of the ... |
Description |
64M bit, 2.7-Volt Page Mode Flash Memory, Bottom Boot
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File Size |
225.01K /
30 Page |
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Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
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Part No. |
CY7C1352-133AC CY7C1352-80AC
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OCR Text |
...synchronous self-timed writes asynchronous output enable jedec-standard 100-pin tqfp package burst capability?linear or interleaved bu...latched. the access can either be a read or write operation, depending on the sta- tus of the write ... |
Description |
256K x18 Pipelined SRAM with NoBL Architecture 256K X 18 ZBT SRAM, 7 ns, PQFP100
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File Size |
187.29K /
12 Page |
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Mitsubishi Electric Semiconductor
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Part No. |
M5M5V5636GP16
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OCR Text |
...nous selftimed write circuitry. asynchronous inputs include Output Enable (G#), Clock (CLK) and Snooze Enable (ZZ). The HIGH input of ZZ pin...latched A18~A2 latched A18~A2 latched A18~A2
0,0 0,1 1,0 1,1
0,1 0,0 1,1 1,0
1,0 1,1 0,0 0,... |
Description |
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
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File Size |
249.20K /
16 Page |
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MITSUBISHI[Mitsubishi Electric Semiconductor] Mitsubishi Electric Corporation
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Part No. |
M5M5V5636GP-16 M5M5V5636GP16
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OCR Text |
...nous selftimed write circuitry. asynchronous inputs include Output Enable (G#), Clock (CLK) and Snooze Enable (ZZ). The HIGH input of ZZ pin...latched A18~A2 latched A18~A2 latched A18~A2
0,0 0,1 1,0 1,1
0,1 0,0 1,1 1,0
1,0 1,1 0,0 0,... |
Description |
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
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File Size |
255.92K /
17 Page |
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it Online |
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Price and Availability
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