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30SC4MT 1N5233B 4D5N60F NE592N8 HS24145 010A2 LANB512N TS108409
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For inverted Found Datasheets File :: 8601    Search Time::1.344ms    
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    FTLX1472M3BNL

Finisar Corporation.
Part No. FTLX1472M3BNL
OCR Text ...er ground 1 12 rd- receiver inverted data out. ac coupled. 13 rd+ receiver non-inverted data out. ac coupled. 14 v eer receiver ground 1 15 v ccr receiver power supply 16 v cct transmitter power supply 17 v eet t...
Description 10Gb/s Multi-Rate, 10km Single Mode SFP Transceiver

File Size 288.27K  /  11 Page

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    NBSG53AMNG NBSG53AMNR2G NBSG53A_06 NBSG53ABA NBSG53ABAEVB NBSG53ABAR2 NBSG53AMN NBSG53AMNR2 NBSG53A06

ONSEMI[ON Semiconductor]
Part No. NBSG53AMNG NBSG53AMNR2G NBSG53A_06 NBSG53ABA NBSG53ABAEVB NBSG53ABAR2 NBSG53AMN NBSG53AMNR2 NBSG53A06
OCR Text ...W Termination Pin. See Table 4. inverted Differential Input. B1 3 CLK Noninverted Differential Input. B2 A1 A2 4 5 6 VTCLK VTD D Internal 50 W Termination Pin. See Table 4. Internal 50 W termination pin. See Table 4....
Description 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS

File Size 150.51K  /  18 Page

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    NB7L1MMNR2 NB7L1MMNR2G NB7L111MMN NB7L111MMNG NB7L111M

ONSEMI[ON Semiconductor]
Part No. NB7L1MMNR2 NB7L1MMNR2G NB7L111MMN NB7L111MMNG NB7L111M
OCR Text ...tion pin for CLK0. (Note 2) Non-inverted differential clock/data input 0 (Note 2). 4 CLK0 inverted differential clock/data input 0 (Note 2). 5 6 7 VTCLK0 VTSEL SEL Internal 50 W termination pin for CLK0. (Note 2) Internal ...
Description 2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output

File Size 249.26K  /  13 Page

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    NB6L72MMNG NB6L72MMNR2G NB6L72M_07 NB6L72M

ONSEMI[ON Semiconductor]
Part No. NB6L72MMNG NB6L72MMNR2G NB6L72M_07 NB6L72M
OCR Text ...ial Input. Note 1 3 D0 inverted Differential Input. Note 1 4 5 6 VTD0 VTD1 D1 Internal 50 W Termination Pin. Note 1. Internal 50 W termination pin. Note 1. Noninverted Differential Input. Note 1. 7 D1 inverted Dif...
Description 2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with CML Outputs

File Size 141.89K  /  10 Page

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    NB7V32MMNTXG

ON SEMICONDUCTOR
Part No. NB7V32MMNTXG
OCR Text ...k lvpecl, cml, lvds input non ? inverted differential clk input. (note 1) 3 clk lvpecl, cml, lvds input inverted differential clk input. (note 1) 4 vtclk ? internal 50 termination pin for clk 5 vrefac ? internally generated output volta...
Description 1.8V / 2.5V, 10GHz ?2 Clock Divider with CML Outputs

File Size 132.95K  /  9 Page

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    HI-1570PSI HI-1570PSM HI-1570PST HI-1570CDT HI-1570 HI-1570CDI HI-1570CDM

HOLTIC[Holt Integrated Circuits]
Part No. HI-1570PSI HI-1570PSM HI-1570PST HI-1570CDT HI-1570 HI-1570CDI HI-1570CDM
OCR Text ...or channel B Receiver B output, inverted Receiver B output, non-inverted Transmit inhibit, channel B. If high BUSB, BUSB disabled Transmitter B digital data input, non-inverted Transmitter B digital data input, inverted Receiver A output, i...
Description 5V Monolithic Dual Variable AmplitudeTransceiver

File Size 74.29K  /  9 Page

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    UT7R995C

Aeroflex Circuit Technology
Part No. UT7R995C
OCR Text ...3. when 4q[1:0] are set to ru n inverted (4f[1:0] = hh), soe disables these out- puts high when pe/hd = high or mid, soe disables them low when pe/hd = low. 4. skew accuracy is within +/- 15% of n*t u where "n" is the selected number o...
Description RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer

File Size 223.64K  /  22 Page

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    HI-1569PQI HI-1569PQM HI-1569PQT HI-1569

HOLTIC[Holt Integrated Circuits]
Part No. HI-1569PQI HI-1569PQM HI-1569PQT HI-1569
OCR Text ...LL pins) Receiver B output, non-inverted Receiver B enable. If low, forces RXB and RXB low Receiver B output, inverted MIL-STD-1553 bus receiver B, positive signal MIL-STD-1553 bus receiver B, negative signal Transmit inhibit, channel B. If...
Description 5V Monolithic Dual Transceiver

File Size 95.64K  /  8 Page

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    ONSEMI[ON Semiconductor]
Part No. NB4N855S_06 NB4N855S NB4N855SMR4 NB4N855SMR4G
OCR Text ...fferential Clock/Data D0 Input. inverted Differential Clock/Data D0 Input. Noninverted Differential Clock/Data D1 Input. inverted Differential Clock/Data D1 Input. Ground. 0 V. inverted Q1 output. Typically loaded with 100 W receiver termin...
Description 3.3 V, 1.5 Gb/s Dual AnyLevel TM to LVDS Receiver/Driver/Buffer/ Translator

File Size 184.56K  /  9 Page

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    MC74HC158AD MC74HC158ADT MC74HC158AN MC74HC158A ON1359

Motorola, Inc
ON Semi
Part No. MC74HC158AD MC74HC158ADT MC74HC158AN MC74HC158A ON1359
OCR Text ... is presented at the outputs in inverted form for the HC158A. A high level on the Output Enable input sets all four Y outputs to a high level for the HC158A. MC74HC158A 16 1 N SUFFIX PLASTIC PACKAGE CASE 648-08 * * * * * * * ...
Description Quad 2-Input Data Selector/Multiplexer
QUAD 2-INPUT DATA SELECTORS/MULTLPTEXERS
From old datasheet system

File Size 147.64K  /  7 Page

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