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pecl lvcmos Datasheet PDF File

For pecl lvcmos Found Datasheets File :: 520 Search Time::1.172ms
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				ONSEMI[ON Semiconductor]
Part No.	NBSG53A NBSG53AMN NBSG53AMNR2 NBSG53ABAR2 NBSG53ABAEVB NBSG53ABA
OCR Text	...and accept NECL (Negative ECL), pecl (Positive ECL), lvcmos/LVTTL, CML, or LVDS. The OLS input is used to program the peak-to-peak output amplitude between 0 and 800 mV in five discrete steps. The RESET and SELECT inputs are single-ended an...
Description	2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
File Size	133.19K / 18 Page	View it Online	Download Datasheet

				Motorola, Inc
Part No.	MPC932
OCR Text	...ce to EXT_FB Average Delay TCLK pecl_CLK Output Duty Cycle (Note 4.) Output Rise/Fall Time (Note 4.) Output Disable Time Output Enable Time Cycle-to-Cycle Jitter (Peak-to-Peak) ps ps ns ns ns ps ms fref = 50MHz; Note 7. 0.8 to 2.0V...
Description	LOW VOLTAGE PLL CLOCK DRIVER
File Size	111.02K / 8 Page	View it Online	Download Datasheet

				Freescale Semiconductor, Inc MOTOROLA[Motorola Inc] Motorola, Inc
Part No.	MPC9600 MPC9600FA
OCR Text	...ut Input Input Input Input Type pecl lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos Power supply Power supply Ground GND QFB Description Differential reference clock frequency input Reference clock input...
Description	LOW VOLTAGE 2.5V AND 3.3 V CMOS PLL CLOCK DRIVER LOW VOLTAGE 2.5 V AND 3.3 V CMOS PLL CLOCK DRIVER
File Size	320.52K / 16 Page	View it Online	Download Datasheet

				CYPRESS[Cypress Semiconductor]
Part No.	CYP15G0402DX CYP15G0402DX-BGC CYP15G0402DX-BGI
OCR Text	...k multiplier PLL * Differential pecl-compatible serial inputs * Differential pecl-compatible serial outputs -- Source matched for 50 transmi...lvcmos input clock parallel interfaces. For an lvcmos or LVTTL input clock connect clock source to R...
Description	Quad HOTLinkII SERDES
File Size	519.41K / 27 Page	View it Online	Download Datasheet

				hitachi
Part No.	HM67S18258SERIES 67S18258
OCR Text	...n mode is provided Differential pecl Clock Inputs Boundary Scan Protocol Single Clock Resister-Latch Mode Ordering Information Type Number HM67S18258BP-7 Cycle Time 7.0 ns Package 119 Bump 1. 27 mm 14 mm x 22 mm BGA (BP-119) ll power...
Description	From old datasheet system
File Size	126.66K / 24 Page	View it Online	Download Datasheet

				Motorola, Inc
Part No.	MPC9331
OCR Text	...rence clock signal Differential pecl reference clock signal PLL feedback signal input, connect to an output Feedback select Reference clock ...lvcmos lvcmos LVpecl LVpecl IOH = -24 mA(2) IOL = 24 mA IOL = 12 mA VIN = VCC or GND VCC_PLL Pin All...
Description	3.3 V 1:6 lvcmos PLL CLOCK GENERATOR
File Size	305.14K / 12 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NBSG72AMNG NBSG72AMNR2 NBSG72A NBSG72AMN
OCR Text	...and accept NECL (Negative ECL), pecl (Positive ECL), lvcmos/LVTTL, CML, or LVDS. The OLS input is used to program the peak-to-peak output amplitude between 0 mV and 800 mV in five discrete steps. The SELECT inputs are single-ended and can b...
Description	2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Output Level Select 2.5V/3.3V SiGe Differential 2 X 2 Crosspoint Switch with Output Level Select
File Size	140.13K / 16 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. IDT[Integrated Device Technology]
Part No.	IDT5V9351PR IDT5V9351PRI IDT5V9351
OCR Text	...e IDT5V9351 uses a differential pecl reference input and an external feedback input. These features allow the IDT5V9351 to be used as a zero...lvcmos Inputs lvcmos Inputs pecl_CLK pecl_CLK IOH = -24mA IOL = 24mA IOL = 12mA Min. 2 -- 250 1 2.4 ...
Description	LOW VOLTAGE PLL CLOCK DRIVER 低压PLL时钟驱动
File Size	73.86K / 10 Page	View it Online	Download Datasheet

For pecl lvcmos Found Datasheets File :: 520 Search Time::1.172ms
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