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bus-termination Datasheet PDF File

For bus-termination Found Datasheets File :: 7287 Search Time::2.375ms
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				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	GTL2020 GTL2020DGG GTL2021 GTL2021DGG GTL2022 GTL2022DGG GTL2023 GTL2023DGG
OCR Text	... The GTL202x series are 32-bit bus switches with GTL termination and octal output enables. The GTL202x is intended to provide GTL bus termination in multi-processor environments. The enable pins allow the system control to disconnect the b...
Description	32-bit GTL terminator with octal enables
File Size	75.67K / 6 Page	View it Online	Download Datasheet

				Hitachi Semiconductor
Part No.	HD26C31
OCR Text	...with high current capability on bus lines. The circuit provides enable input to control all four drivers. The output circuit has active pull...termination resistance when the HD26C31 is used as a balanced differential type driver is shown. Ou...
Description	Quadruple Differential Line Drivers With 3 State Outputs
File Size	75.68K / 15 Page	View it Online	Download Datasheet

				INNOVASIC[InnovASIC, Inc]
Part No.	IA2910A IA2910A-CD40M IA2910A-CLC44M IA2910A-CLL44M IA2910A-PDW40C IA2910A-PDW40I IA2910A-PLC44C IA2910A-PLC44I
OCR Text	...rogram counter - branch address bus 9 Word Deep Stack Register - push/pop control for nesting subroutines 16 Sequence Control Microinstructi...termination counter, the sequence will be executed exactly N + 1 times. During instruction 15, a thr...
Description	Microprogram Controller
File Size	162.18K / 19 Page	View it Online	Download Datasheet

				INTEL[Intel Corporation]
Part No.	INTEL387TMDX
OCR Text	...ins (D31 - D0) 3 1 9 Write Read Bus Cycle (W R ) 3 1 10 Address Strobe (ADS ) 3 1 11 Bus Ready Input (READY ) 3 1 12 Ready Output (READYO ) ...Termination 3 4 Bus Operation 3 4 1 Nonpipelined Bus Cycles 3 4 1 1 Write Cycle 3 4 1 2 Read Cycle 3...
Description	Intel387TM DX MATH COPROCESSOR
File Size	424.10K / 41 Page	View it Online	Download Datasheet

				Intel Corporation
Part No.	INTEL387
OCR Text	... Pins (D15-D0) 4 1 9 Write Read Bus Cycle (W R ) 4 1 10 Address Stobe (ADS ) 4 1 11 Bus Ready Input (READY ) 4 1 12 Ready Output (READYO ) 4...Termination 5 0 BUS OPERATION 5 1 Non-pipelined Bus Cycles 5 1 1 Write Cycle 5 1 2 Read Cycle 5 2 Pi...
Description	Intel387TM SX MATH COPROCESSOR
File Size	469.21K / 47 Page	View it Online	Download Datasheet

				MITEL[Mitel Networks Corporation]
Part No.	PDSP16256 PDSP16256A PDSP16256AC PDSP16256AC1R PDSP16256B0 PDSP16256C0 PDSP16256GC PDSP16256GC1R PDSP16256MC
OCR Text	... DB15:0 X31:0 16-bit data input bus to Network A. Description Delayed data output bus in the single filter mode. Connected to the data...Termination device in a cascaded chain. The X bus provides the output from Network B in both dual mo...
Description	Programmable FIR Filter
File Size	418.96K / 28 Page	View it Online	Download Datasheet

				INFINEON[Infineon Technologies AG]
Part No.	PEB3456 PEB3456E
OCR Text	...Information for Table 9-8 Intel Bus Interface Timing Intel Bus Interface Timing Diagram modified. The setup and hold times for "LD to LRDY" ...Termination with DS3 Framer, M13 Multiplexer, T1/E1 Framers and 256 Channel HDLC/PPP controller is a...
Description	Channelized T3 Termination with DS3 Framer, M13 Multiplexer, T1/ E1 Framers and 256 Channel HDLC/PPP controller
File Size	3,274.28K / 424 Page	View it Online	Download Datasheet

For bus-termination Found Datasheets File :: 7287 Search Time::2.375ms
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