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  generator fanout Datasheet PDF File

For generator fanout Found Datasheets File :: 705    Search Time::1.407ms    
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    AV9179BF-01

Integrated Circuit Systems
Part No. AV9179BF-01
OCR Text ... program the device. the clock generator is a slave-receiver device in the i 2 c protocol. it will allow read-back of the registers. see co...fanout buffers (sdram 0:17). oe oe tristates all outputs when held low. vdds this is the power suppl...
Description Low skew buffer

File Size 559.04K  /  9 Page

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    ICS94236 ICS94236YF-T

Integrated Circuit Systems
Part No. ICS94236 ICS94236YF-T
OCR Text ...6 Programmable System Frequency generator Register Name Functionality & Frequency Select Register Output Control Registers Byte 0 Description Output frequency, hardware / I C frequency select, spread spectrum & output enable control regist...
Description Programmable System Clock Chip for AMD - K7 processor
Programmable System Clock Chip for AMD - K7⑩ processor

File Size 218.17K  /  17 Page

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    49FCT20805NDGPYGI 49FCT20805QGPYGI IDT49FCT2080509 49FCT20805PYGI

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Integrated Device Technology
Part No. 49FCT20805NDGPYGI 49FCT20805QGPYGI IDT49FCT2080509 49FCT20805PYGI
OCR Text ...t c l 15 pf r t z out of pulse generator ? r l 33 ? t r / t f 1 (0v to 2.5v or 2.5v to 0v) ns definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse...
Description 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER

File Size 63.67K  /  8 Page

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. IDT9179BF-01T
OCR Text ... program the device. the clock generator is a slave-receiver device in the i 2 c protocol. it will allow read-back of the registers. see co...fanout buffers (sdram 0:17). oe oe tristates all outputs when held low. vdds this is the power suppl...
Description 9179 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48

File Size 275.25K  /  9 Page

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    Cypress Semiconductor, Corp.
Part No. CY7B9940V-5AXCT CY7B9940V-5AXIT
OCR Text ...ilter vco control logic divide generator feedback bank bank 2 bank 1 matrix logic block diagram [+] feedback roboclockii? junior, cy...fanout output buffers ([1:2]q[a:b][0:1]), and an output disable (dis[1:2]). the feedback bank has o...
Description High Speed Multifrequency PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 10; Operating Range: 0 to 70 C 7B SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP44
High Speed Multifrequency PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 10; Operating Range: -40 to 85 C 7B SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP44

File Size 273.52K  /  13 Page

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    IDT49FCT3805B IDT49FCT3805BPY IDT49FCT3805BPYG IDT49FCT3805BPYGI IDT49FCT3805BPYI IDT49FCT3805BQ IDT49FCT3805BQG IDT49FC

Integrated Device Technology
Part No. IDT49FCT3805B IDT49FCT3805BPY IDT49FCT3805BPYG IDT49FCT3805BPYGI IDT49FCT3805BPYI IDT49FCT3805BQ IDT49FCT3805BQG IDT49FCT3805BQGI IDT49FCT3805BQI IDT49FCT3805BSO IDT49FCT3805BSOG IDT49FCT3805BSOGI IDT49FCT3805BSOI
OCR Text ...GND VCC 500 VIN Pulse generator VOUT D.U.T. 50pF DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse generator. 500 RT Test Circui...
Description 3.3V CMOS BUFFER/CLOCK DRIVER

File Size 370.49K  /  7 Page

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    Integrated Device Technology, Inc.
ICS
Part No. ICS9248-169 ICS9248YF-169LF-T ICS9248YF-169-T
OCR Text generator & Integrated Buffers for Celeron & PII/IIITM Recommended Application: 440BX/VIA Apollo 133/694X style chipset. Output Features: *...fanout Buffers for SDRAM outputs. SDRAM clock outputs, fanout Buffer outputs from BUFFER IN pin (con...
Description 150 MHz, PROC SPECIFIC CLOCK generator, PDSO48 0.300 INCH, SSOP-48
Clock Synthesizer

File Size 196.24K  /  14 Page

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    IDT49FCT3805DPYGI IDT49FCT3805DPYI IDT49FCT3805DQGI IDT49FCT3805DQI IDT49FCT3805EPYGI IDT49FCT3805EPYI IDT49FCT3805EQGI

Integrated Device Technology
Part No. IDT49FCT3805DPYGI IDT49FCT3805DPYI IDT49FCT3805DQGI IDT49FCT3805DQI IDT49FCT3805EPYGI IDT49FCT3805EPYI IDT49FCT3805EQGI IDT49FCT3805EQI IDT49FCT3805D IDT49FCT3805E
OCR Text ...6V VCC O pen G ND 500 VIN Pulse generator RT D.U.T RL CL 500 VOUT Enable and Disable Time Circuit VCC INPUT tPLH1 tPHL1 3V 1.5V 0V VOH 1.5V VOL VIN Pulse generator RT D.U.T RL VOUT CL OUTPUT 1 tSK(o) OUTPUT 2 tPLH2 tPHL...
Description 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER

File Size 67.85K  /  7 Page

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    IDT49FCT20805 IDT49FCT20805PYI IDT49FCT20805QI IDT49FCT20805PYGI IDT49FCT20805PYGI8 IDT49FCT20805PYI8

IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
Part No. IDT49FCT20805 IDT49FCT20805PYI IDT49FCT20805QI IDT49FCT20805PYGI IDT49FCT20805PYGI8 IDT49FCT20805PYI8
OCR Text ...4.6V VCC Open GND 500 VIN Pulse generator RT D.U.T RL CL 500 VOUT Enable and Disable Time Circuit VCC INPUT tPLH1 tPHL1 VIN Pulse generator RT D.U.T RL VOUT CL OUTPUT 1 tSK(o) OUTPUT 2 tPLH2 tPHL2 tSK(o) 2.5V 1.25V 0V V...
Description 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER

File Size 61.12K  /  7 Page

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For generator fanout Found Datasheets File :: 705    Search Time::1.407ms    
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