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pecl lvcmos Datasheet PDF File

For pecl lvcmos Found Datasheets File :: 523 Search Time::1.218ms
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				ICST[Integrated Circuit Systems]
Part No.	ICS843001AG-21T ICS843001-21 ICS843001A21 ICS843001A21L ICS843001AG-21 ICS843001AG-21LF ICS843001AG-21LFT
OCR Text	...GNMENT VCCO_CMOS N0 N1 N2 VCCO_pecl Q0 nQ0 VEE VCCA VCC XTAL_OUT1 XTAL_IN1 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 R...lvcmos output. Output divider select pins. Default /4. lvcmos/LVTTL interface levels. Pulldown Outpu...
Description	FEMTOCLOCKS CRYSTAL-TO-3.3V LVpecl FREQUENCY SYNTHESIZER FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVpecl FREQUENCY SYNTHESIZER
File Size	179.35K / 15 Page	View it Online	Download Datasheet

				AZM[Arizona Microtek, Inc] MINI[Mini-Circuits]
Part No.	AZ12010XP AZ12010 AZ12010AL AZ12010AL_ AZ12010BL AZ12010BL_
OCR Text	...IN Logic Level REFOUT pecl CPREF CPOUT CPPOL lvcmos LVTTL INTREF INTSUM INTOUT SAWIN SAWIN SAWOUT SAWOUT ENABLE CML (Analog) lvcmos LVTTL lvcmos LVTTL pecl DIV_SEL Q Q VBB VEEP VCC VEE November 2006 * REV -...
Description	Multiply by 16, 32 Phase-Locked Loop Clock Generator
File Size	255.91K / 9 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EPT21DG MC100EPT21DR2G MC100EPT21DT MC100EPT21DTG MC100EPT21DTR2 MC100EPT2106 MC100EPT21MNR4G MC100EPT21D MC100EPT21DR2 MC100EPT21DTR2G MC100EPT21MNR4 MC100EPT21
OCR Text	... qJC qJA qJC qJA Tsol Parameter pecl Power Supply pecl Input Voltage VBB Sink/Source Operating Temperature Range Storage Temperature Range T...lvcmos OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V, TA = -40C to 85C Symbol VOH VOL ICCH ICC...
Description	3.3V DIFFERENTIAL LVpecl/LVDS/CML TO LVTTL/lvcmos TRANSLATOR
File Size	80.48K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EP195FAG MC100EP195MNR4G MC10EP195MNR4G MC10EP19506 MC10EP195MNG MC100EP195 MC100EP195FA MC100EP195FAR2 MC100EP195FAR2G MC100EP195MNG MC10EP195 MC10EP195FA MC10EP195FAG MC10EP195FAR2 MC10EP195FAR2G
OCR Text	...le delay of a differential NECL/pecl input transition. http://onsemi.com The delay section consists of a programmable matrix of gates and mu...lvcmos, ECL, or LVTTL level signals. For lvcmos input A = Assembly Location levels, leave VCF and VE...
Description	3.3V ECL PROGRAMMABLE DELAY CHIP
File Size	217.88K / 20 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EP195FA MC10EP195 MC10EP195FAR2 MC100EP195 MC100EP195FAR2 MC10EP195FA MC10EP195NBSP
OCR Text	...le delay of a differential NECL/pecl input transition. http://onsemi.com The delay section consists of a programmable matrix of gates and mu...lvcmos, ECL, or LVTTL level signals. For lvcmos input ORDERING INFORMATION levels, leave VCF and VEF...
Description	From old datasheet system 3.3V ECL PROGRAMMABLE DELAY CHIP
File Size	127.18K / 20 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EP196FAR2G MC100EP19606 MC100EP196FAG MC100EP196FAR2 MC100EP196 MC100EP196FA
OCR Text	...le delay of a differential NECL/pecl input transition. It has similar architecture to the EP195 with the added feature of further tuneabilit...lvcmos, ECL, or LVTTL level signals. LVTTL and lvcmos ORDERING INFORMATION operation is available in...
Description	3.3V ECL PROGRAMMABLE DELAY CHIP WITH FTUNE
File Size	212.65K / 18 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NBSG111 NBSG111-D
OCR Text	...and accept NECL (Negative ECL), pecl (Positive ECL), LVTTL, lvcmos, CML, or LVDS. Outputs are RSECL (Reduced Swing ECL), 400 mV. The Q[0:9] / Q[0:9] outputs have a differential synchronous enable (EN/EN) pin. The synchronous enable pin is u...
Description	2.5V/3.3VSiGe Differential 1:10 Clock/Data Driver with RSECL* Outputs From old datasheet system
File Size	87.02K / 10 Page	View it Online	Download Datasheet

				ALSC[Alliance Semiconductor Corporation]
Part No.	ASM5I9773AG-52-ET ASM5I9773A ASM5I9773A-52-ER ASM5I9773A-52-ET ASM5I9773AG-52-ER
OCR Text	...e 2005 rev 0. 3 Block Diagram pecl_CLK pecl_CLK# VCO_SEL PLL_EN REF_SEL 0 TCLK0 TCLK1 TCLK_SEL FB_IN 0 1 LPF D Q Sync Frz Phase Detector V...lvcmos Description LVpecl reference clock input. LVpecl reference clock input. lvcmos/LVTTL refe...
Description	Octal D-Type Flip-Flops With Clear 20-SO -40 to 85 Octal D-Type Flip-Flops With Clear 20-SOIC -40 to 85 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
File Size	620.40K / 16 Page	View it Online	Download Datasheet

For pecl lvcmos Found Datasheets File :: 523 Search Time::1.218ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | <14> | 15 |