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IDT
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Techn...
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| Part No. |
IDT71V3577S75PFG IDT71V3577SA80PFGI IDT71V3577SA85PFGI IDT71V3577SA75PFG IDT71V3577SA75PFGI IDT71V3577YS75PFGI IDT71V3577YSA80PFG IDT71V3577YSA75PFG IDT71V3577YSA75PFGI IDT71V3577YSA80PFGI IDT71V3579S75PFG IDT71V3579YS75PFGI IDT71V3579YSA80BQG IDT71V3579YSA80BQGI IDT71V3579YS80BQG IDT71V3579YS80BQGI IDT71V3579YS75BQGI IDT71V3579S85BQGI IDT71V3579S85BGG IDT71V3579SA75BGGI IDT71V3579SA75BQG IDT71V3579SA75BGG IDT71V3579SA75PFG IDT71V3579SA75PFGI IDT71V3577YSA75BQG IDT71V3579S75BQG IDT71V3577YS80BQG IDT71V3577YS80PFG IDT71V3577YS80BQGI IDT71V3577YS80PFGI IDT71V3577YS85BGG IDT71V3577YS85BGGI IDT71V3577YS85BQG IDT71V3577YS85BQGI IDT71V3577YS85PFG IDT71V3577YS85PFGI IDT71V3577S75BQ8
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| OCR Text |
...ler. trst jtag reset (optional) ilow optional asynchronous jtag reset. can be used to reset the tap controller, but not required. jtag reset occurs automatically at power up and also resets using tms and tck per ieee 1 149.1. if not used t... |
| Description |
3.3V 128K x 36 Synchronous Flow-Through SRAM w/3.3V I/O
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K的米656 × 18 3.3同步SRAM.3VI / O的流量，通过输出脉冲计数器，单周期取
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 256K X 18 CACHE SRAM, 7.5 ns, PQFP100
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 7.5 ns, PQFP100
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K的米656 × 18 3.3同步SRAM.3V的I / O的流量，通过输出脉冲计数器，单周期取
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 256K X 18 CACHE SRAM, 8 ns, PBGA165
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| File Size |
524.78K /
22 Page |
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Integrated Device Technology, Inc.
IDT
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| Part No. |
IDT71V2548S133PF IDT71V2548S133BGI IDT71V2548SA133BG IDT71V2548S133BQ IDT71V2548S133PFI IDT71V2548SA133BQ IDT71V2548S133BQI IDT71V2548SA133BQI IDT71V2546S133BQI IDT71V2548SA150PFI IDT71V2548SA150BQ IDT71V2548S150PF IDT71V2546SA IDT71V2546SA100BQI IDT71V2548SA100PFI IDT71V2546SA133BQ IDT71V2546SA133BQI IDT71V2548S150BG IDT71V2548S150BGI IDT71V2548S150PFI IDT71V2546S150PFI IDT71V2546S150BQ IDT71V2546S150BQI IDT71V2546SA100PFI IDT71V2546S100PFI8 IDT71V2546S100PF8 IDT71V2546SA150PF IDT71V2546SA150PFI
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| OCR Text |
...ler. trst jtag reset (optional) ilow optional asynchronous jtag reset. can be used to reset the tap controller, but not required. jtag reset occurs automatically at power up and also resets using tms and tck per ieee 1149.1. if not used tr... |
| Description |
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 4.2 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K的3656 × 18 3.3同步ZBT SRAM.5VI / O的脉冲计数器输出流水
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 256K X 18 ZBT SRAM, 3.8 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 256K X 18 ZBT SRAM, 3.8 ns, PQFP100
25V N-Channel PowerTrench MOSFET; Package: TO-251(IPAK); No of Pins: 3; Container: Rail 128K的3656 × 18 3.3同步ZBT SRAM.5VI / O的脉冲计数器输出流水
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 5 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K的36256 × 18 3.3同步ZBT SRAM2.5VI / O的脉冲计数器输出流水
128K x 36/ 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O/ Burst Counter Pipelined Outputs
3.3V 256K x 18 ZBT Synchronous PipeLined SRAM w/2.5V I/O
3.3V 128Kx36 ZBT Synchronous PipeLined SRAM with 2.5V I/O
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| File Size |
1,009.24K /
28 Page |
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it Online |
Download Datasheet |
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Integrated Device Technology, Inc.
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| Part No. |
IDT71V3548SA133PFI IDT71V3548SA100PF IDT71V3548SA100PFI
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| OCR Text |
...ler. trst jtag reset (optional) ilow op tional asynchro no us jtag rese t. can b e used to re set the tap controlle r, but no t re quired . jtag reset occurs automatically at power up and also resets using tms and tck per ieee 1149.1. if ... |
| Description |
256K x 18 3.3V Synchronous ZBT SRAM 3.3V I/O, Burst Counter Pipelined Outputs 256 × 18 3.3同步ZBT SRAM.3V的I / O的脉冲计数器输出流水
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| File Size |
493.94K /
26 Page |
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it Online |
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Integrated Device Technology, Inc.
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| Part No. |
IDT71T75902
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| OCR Text |
...ler. trst jtag reset (optional) ilow optional asynchronous jtag reset. can be used to reset the tap controller, but not required. jtag reset occurs automatically at power up and also resets using tms and tck per ieee 1149.1. if not used ... |
| Description |
512K x 36, 1M x 18 2.5V Synchronous ZBTSRAMs 2.5V I/O, Burst Counter Flow-Through Outputs 12k × 3600万18⑩为2.5V同步ZBT SRAM.5VI / O的突发反流，通过输出
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| File Size |
638.87K /
26 Page |
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