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ST Microelectronics
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| Part No. |
STPAY-JS-D18-DVS
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| OCR Text |
... herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a lic... |
| Description |
Dual Interface DDA Static Java with 18Kbytes EEPROM
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| File Size |
229.38K /
3 Page |
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VISAY[Vishay Siliconix]
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| Part No. |
SI7403BDN
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| OCR Text |
...ns of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. IS ISM VSD trr Qrr ta tb IF = -4.1 A di/dt = 100 A/ms TJ = 25_C 4 1 A, A/ms, IS = -2.6 A, VGS = 0 V ... |
| Description |
P-Channel 20-V (D-S) MOSFET
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| File Size |
95.29K /
8 Page |
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it Online |
Download Datasheet |
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ONSEMI[ON Semiconductor]
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| Part No. |
MC100EL51DG MC100EL51DR2G MC100EL51DT MC100EL51DTG MC100EL51DTR2 MC100EL51DTR2G MC100EL51MNR4 MC100EL51MNR4G MC10EL5106 MC10EL51DG MC10EL51DR2G MC10EL51DT MC10EL51DTG MC10EL51DTR2 MC10EL51DTR2G MC10EL51MNR4 MC10EL51MNR4G MC10EL51DR2 MC100EL51 MC100EL51D MC100EL51DR2 MC10EL51 MC10EL51D
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| OCR Text |
...ded Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
http://onsemi.com
2
MC10EL51, MC100EL51
Table 4. 10EL SERIES PECL DC CHARACTERISTICS VC... |
| Description |
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop(5V ECL 差分时钟D触发
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| File Size |
149.34K /
9 Page |
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it Online |
Download Datasheet |
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Price and Availability
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