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For runt Found Datasheets File :: 516 Search Time::1.485ms
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				Motorola, Inc
Part No.	MC100EP223 MC100EP223TC
OCR Text	...re is a chance of generating a `runt' clock pulse when the device is enabled/disabled. To avoid this, the output enable (OE) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. MC100EP...
Description	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
File Size	81.77K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EP445FAG MC100EP445FAR2G MC10EP445 MC10EP445FAG MC10EP445FAR2G MC10EP44506 MC10EP445FAR2 MC100EP445 MC100EP445FA MC100EP445FAR2 MC10EP445FA
OCR Text	...ault State CLK ENABLE Immune to runt Pulse Generation Pb-Free Packages are Available* *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in th...
Description	3.3V/5V ECL 8−Bit Serial/Parallel Converter
File Size	148.92K / 18 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC100EP445 MC100EP445FA MC100EP445FAR2 MC10EP445FA MC10EP445FAR2
OCR Text	...eel * * CLK ENABLE Immune to runt Pulse Generation (c) Semiconductor Components Industries, LLC, 2002 1 November, 2002 - Rev. 7 Publication Order Number: MC10EP445/D MC10EP445, MC100EP445 PCLK PCLK VCC VCC VCC ...
Description	3.3V/5V ECL 8-Bit Serial/Parallel Converter 3.3V/5VECL 8-Bit Serial/Parallel Converter
File Size	115.79K / 16 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EP809FAG MC100EP809FAR2G MC100EP80906 MC100EP809FAR2 MC100EP809 MC100EP809FA
OCR Text	...LVTTL. To avoid generation of a runt clock pulse when the device is enabled/disabled, the Output Enable (OE), which is LVTTL, is synchronous ensuring the outputs will only be enabled/disabled when they are already in LOW state (Figure 8). T...
Description	3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
File Size	134.73K / 9 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC100EP809 MC100EP809FA MC100EP809FAR2 MC100EP809-D
OCR Text	...LVTTL. To avoid generation of a runt clock pulse when the device is enabled/disabled, the Output Enable (OE), which is LVTTL, is synchronous ensuring the outputs will only be enabled/disabled when they are already in LOW state (See Figure 8...
Description	3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
File Size	75.94K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEL1406 MC100LVEL14DWR2 MC100LVEL14DWR2G MC100LVEL14DWG MC100LVEL14 MC100LVEL14DW
OCR Text	...oids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specificatio...
Description	3.3V ECL 1:5 Clock Distribution Chip
File Size	124.60K / 6 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEL38DW MC100LVEL3806 MC100LVEL38DWR2G MC100LVEL38 MC100LVEL38DWG MC100LVEL38DWR2
OCR Text	...oids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider ...
Description	3.3V ECL ÷2, ÷4/6 Clock Generation Chip 3.3V ECL ±2, ±4/6 Clock Generation Chip
File Size	120.10K / 7 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEL39DWR2 MC100LVEL39DWR2G MC100LVEL39DW MC100LVEL39DWG MC100LVEL39
OCR Text	...oids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider ...
Description	3.3V ECL ±2/4, ±4/6 Clock Generation Chip
File Size	117.45K / 6 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEP1406 MC100LVEP14DTR2G MC100LVEP14 MC100LVEP14DT MC100LVEP14DTG MC100LVEP14DTR2
OCR Text	...in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock; therefore, all associated specificati...
Description	2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver
File Size	134.81K / 9 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEP34DG MC100LVEP34DR2G MC100LVEP34DTG MC100LVEP3406 MC100LVEP34DTR2G MC100LVEP34 MC100LVEP34D MC100LVEP34DR2 MC100LVEP34DT MC100LVEP34DTR2
OCR Text	...oids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider ...
Description	2.5V / 3.3V ECL ÷2, ÷4, ÷8 Clock Generation Chip 2.5V / 3.3V ECL ±2, ±4, ±8 Clock Generation Chip
File Size	147.53K / 12 Page	View it Online	Download Datasheet

For runt Found Datasheets File :: 516 Search Time::1.485ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | <15> |