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Zarlink Semiconductor Inc.
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| Part No. |
MT9315
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| OCR Text |
...sclk ena2 law agc user gain + - adv + - -24 -> +21db r 1 r 2 r 3 s 2 s 3 nlp adv nlp linear m /a-law/ + + howling controller port 1 nbsd ada...cmos compatible logic levels and pwrdn pin which has schmitt trigger compatible logic levels. 2. all... |
| Description |
CMOS Acoustic Echo Canceller
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| File Size |
360.70K /
30 Page |
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it Online |
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Fujitsu Microelectronics
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| Part No. |
MB82BDR08163A-70L
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| OCR Text |
...l (low active) clk clock input adv address valid input (low active) wait wait signal output dq 16-9 upper byte data input/output dq 8-1 lower byte data input/output v dd power supply v ddq i/o power supply v ss ground a22 to a3 y controlle... |
| Description |
Products psuedo-SRAM complying to COSMORAM standards
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| File Size |
919.24K /
52 Page |
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it Online |
Download Datasheet |
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Renesas
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| Part No. |
M5M5V5636UG-16 M5M5V5636GP-16I
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| OCR Text |
...E2, E3#), Address Advance/Load (ADV), Clock Enable (CKE#), Byte Write Enables (BWa#, BWb#, BWc#, BWd#) and Read/Write (W#). Write operations...CMOS Standby Current (CLK stopped standby mode)
mA mA
120
8/25 M5M5V5636UG-16 REV.2.0
Re... |
| Description |
Memory>Fast SRAM>Network SRAM
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
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| File Size |
896.25K /
25 Page |
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it Online |
Download Datasheet |
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Samsung Electronic
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| Part No. |
K1B6416B6C
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| OCR Text |
...tion(address latch type and low adv type) ? supports synchronous burst read and synchronous burst write operation ? synchronous burst(r...cmos technology using one transistor memory cell. the device supports the traditi onal sram like as... |
| Description |
4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory
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| File Size |
769.92K /
46 Page |
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it Online |
Download Datasheet |
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Price and Availability
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