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				GSI Technology
Part No.	GS818DV18D-250I GS818DV18D-300 GS818DV18D-300I GS818DV18D-333
OCR Text	...ual doubledata rate interface ? echo clock outputs track data output drivers ? byte write controls sampled at data-in time ? burst of 4 read and write ? 2.5 v +100/?100 mv core power supply ? 1.5 v or 1.8 v hstl interface ? pipelined read o...
Description	250MHz 1M x 18 18MB sigmaQuad SRAM 300MHz 1M x 18 18MB sigmaQuad SRAM 333MHz 1M x 18 18MB sigmaQuad SRAM
File Size	481.11K / 26 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	IDT72T72105
OCR Text	... ? ? ? read enable & read clock echo outputs aid high speed operation ? ? ? ? ? user selectable asynchronous read and/or write port timing ? ? ? ? ? 2.5v lvttl or 1.8v, 1.5v hstl port selectable input/ouput voltage ? ? ? ? ? 3.3v input tole...
Description	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
File Size	374.80K / 54 Page	View it Online	Download Datasheet

				Mitel Semiconductor MITEL[Mitel Networks Corporation]
Part No.	MT8910-1 MT8910-1AC MT8910-1AP
OCR Text	...er single twisted pair Advanced echo cancelling technology High performance 2B1Q line code Full activation/deactivation state machine QSNR and line attenuation diagnostics Frame and superframe synchronization On-chip 15 second timer Inserti...
Description	CMOS ST-BUS FAMILY Digital Subscriber Line Interface Circuit CMOS ST-BUS⑩ FAMILY Digital Subscriber Line Interface Circuit
File Size	418.42K / 26 Page	View it Online	Download Datasheet

				Mitel Semiconductor MITEL[Mitel Networks Corporation]
Part No.	MT8971B MT8971BE MT8971BP MT8972BC MT8972BE MT8972BP
OCR Text	...r 160 kbit/s line rate Adaptive echo cancellation Up to 3km (8971B) and 4 km (8972B) ISDN compatible (2B+D) data format Transparent modem capability Frame synchronization and clock extraction MITEL ST-BUS compatible Low power (typically 50 ...
Description	ISO2-CMOS ST-BUS FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit
File Size	390.10K / 20 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	IDT72T51553L5BB IDT72T51553L5BBI IDT72T51553L6BB
OCR Text	...? ? 3.6ns access time ? ? ? ? ? echo read enable & echo read clock outputs ? ? ? ? ? individual, active queue flags ( ov , ff , pae , paf ) ? ? ? ? ? 8 bit parallel flag status on both read and write ports ? ? ? ? ? shows pae and paf ...
Description	2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (32 QUEUES) 18 BIT WIDE CONFIGURATION
File Size	541.19K / 57 Page	View it Online	Download Datasheet

				Cypress
Part No.	CY7C2268KV18-550BZC CY7C2270KV18-400BZXC CY7C2270KV18-550BZXC
OCR Text	... ? sram uses rising edges only echo clocks (cq and cq ) simplify data capture in high speed systems data valid pin (qvld) to indicate valid data on the output on-die termination (odt) feature ? supported for d [x:0] , bws [x:0] , and k/k...
Description	36-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
File Size	631.40K / 30 Page	View it Online	Download Datasheet

				Cypress
Part No.	CY7C2168KV18-550BZC CY7C2170KV18-400BZXC CY7C2170KV18-550BZXC
OCR Text	... ? sram uses rising edges only echo clocks (cq and cq ) simplify data capture in high-speed systems data valid pin (qvld) to indicate valid data on the output on-die termination (odt) feature ? supported for d [x:0] , bws [x:0] , and k/k...
Description	18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
File Size	634.53K / 30 Page	View it Online	Download Datasheet

				Cypress
Part No.	CY7C1668KV18-450BZXC CY7C1668KV18-550BZXC
OCR Text	... ? sram uses rising edges only echo clocks (cq and cq ) simplify data capture in high-speed systems data valid pin (qvld) to indicate valid data on the output synchronous internally self-timed writes ddr ii+ operates with 2.5-cycle rea...
Description	144-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
File Size	610.95K / 30 Page	View it Online	Download Datasheet

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