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  two-pll Datasheet PDF File

For two-pll Found Datasheets File :: 14117    Search Time::1.25ms    
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    PLRXXL-SC-S43-C1

JDS Uniphase Corporation
Part No. PLRXXL-SC-S43-C1
OCR Text ... power down/reset (P_Down/RST). Two loopback modes are available through the two-wire serial interface. The loopback modes are useful to fac...PLL to determine line rate and signal lock condition. The Tx clock circuit provides a lock alarm out...
Description RoHS6/6 compliant, 10GbE / FC SR / SW, 850 nm, commercial temperature range, 10 Gb/s XFP optical transceiver

File Size 568.74K  /  18 Page

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    ICS810001-22 810001BK-22LF 810001BK-22LFT

Integrated Device Technology
http://
Part No. ICS810001-22 810001BK-22LF 810001BK-22LFT
OCR Text ...ranslation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a VCXO PLL that is optimized to provide reference clock jitter attenuation, and to support the complex PLL multipli...
Description FemtoClock垄芒 Dual VCXO Video PLL
FemtoClock?/a> Dual VCXO Video PLL
FemtoClock Dual VCXO Video PLL

File Size 718.92K  /  18 Page

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    MPC5200B10 SC103335VR400B MPC5200B MPC5200CVR466B MPC5200VR400B MEDIA5200KIT1 MEDIA5200KIT1E SPC5200CVR400BR2

FREESCALE SEMICONDUCTOR INC
Freescale Semiconductor, Inc
Part No. MPC5200B10 SC103335VR400B MPC5200B MPC5200CVR466B MPC5200VR400B MEDIA5200KIT1 MEDIA5200KIT1E SPC5200CVR400BR2
OCR Text ...256 MB addressing range per CS, two CS available - 32-bit data bus - Built-in initialization and refresh * Flexible multi-function External ...PLL and clock generation Freescale reserves the right to change the detail specifications as may ...
Description 32-BIT, 400 MHz, MICROPROCESSOR, PBGA272
SDRAM/DDR Memory Controller

File Size 509.24K  /  72 Page

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    MPC825005

Freescale Semiconductor, Inc
Part No. MPC825005
OCR Text ...ed: the mpc8250 is available in two packages?the standard zu package (480 tbga) and an alternate vr package (516 pbga)?as described in se...pll supply voltage 2 vccsyn -0.3 ? 2.5 v i/o supply voltage 3 3 caution: vddh can exceed vdd/vccs...
Description Hardware Specifications

File Size 1,016.32K  /  60 Page

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    Philips
Part No. TDA8745/N2
OCR Text ...ide or narrow) demodulation of two audio signals by wide band phase-locked loops (plls) audio level control after pll (modulation depth setting) noise reduction (nr) bypass for use with main audio signals left, right and mono output [ 1...
Description Satellite sound receiver with

File Size 192.27K  /  40 Page

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    ICS810252BI-03 810252BYI-03LF 810252BYI-03LFT 810252BKI-03LF 810252BKI-03LFT

Integrated Device Technology
Part No. ICS810252BI-03 810252BYI-03LF 810252BYI-03LFT 810252BKI-03LF 810252BKI-03LFT
OCR Text ...ranslation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a VCXO PLL that is optimized to provide reference clock jitter attenuation. The second stage is a FemtoClock freque...
Description VCXO Jitter Attenuator and FemtoClock垄芒 Multiplier
VCXO Jitter Attenuator and FemtoClock Multiplier
VCXO Jitter Attenuator and FemtoClock?/a> Multiplier

File Size 206.29K  /  24 Page

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    DSP56F801FA80 DSP56F801FA60 DSP56F801FA60E DSP56F801 DSP56F801-7UM DSP56F801FA80E 56F801E 56F801-1

Freescale Semiconductor...
Freescale Semiconductor, Inc
Part No. DSP56F801FA80 DSP56F801FA60 DSP56F801FA60E DSP56F801 DSP56F801-7UM DSP56F801FA80E 56F801E 56F801-1
OCR Text ... loops * 6-channel PWM Module * Two 4-channel, 12-bit ADCs * Serial Communications Interface (SCI) * Serial Peripheral Interface (SPI) * 8K ...PLL 3 XDB2 CGDB XAB1 XAB2 16-Bit 56800 Core Clock Gen or Optional Internal Relaxation Os...
Description 16-bit Digital Signal Controllers

File Size 291.78K  /  48 Page

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    NB2309AI1HDTR2 NB2309AC1HDTR2

ON Semiconductor
Part No. NB2309AI1HDTR2 NB2309AC1HDTR2
OCR Text ...the clkout pad. the nb2309a has two banks of four outputs each, which can be controlled by the select inputs as shown in the select input de...pll ? available in 16 pin, 150 mil soic and 4.4 mm tssop ? 3.3 v operation, advanced 0.35 cmos t...
Description 3.3V Nine Output Zero Delay Buffer; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16

File Size 147.25K  /  10 Page

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