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For usable Found Datasheets File :: 4986    Search Time::1.313ms    
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    MAX7000 MAX7000S EPM7128E EPM7128S EPM7256E EPM7256S EPM7160S EPM7160SLC84-7 EPM7032 EPM7032LC44-10 EPM7032S EPM7032TC44

ATERA
Altera Corporation
Part No. MAX7000 MAX7000S EPM7128E EPM7128S EPM7256E EPM7256S EPM7160S EPM7160SLC84-7 EPM7032 EPM7032LC44-10 EPM7032S EPM7032TC44-10 EPM7160E EPM7064 EPM7064S EPM7192E EPM7192S EPM7192SQC160-10 EPM7192SQC160-15 EPM7096 EPM7128SLC EPM7032AET EPM7064SLC EPM7128STC EPM7128SQC EPM7128SLC84-15 EPM7128STC100 EPM7064SLC44-10 EPM7032LC44-15 EPM7032LC44-12 EPM7032AETC44 EPM7128SQC160-15 EPM7128SLI84-10
OCR Text ...ities ranging from 600 to 5,000 usable gates (see Tables 1 and 2) 5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect) PCI-compliant devices available f For information on in-system programmab...
Description Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 10ns
MAX 7000 Programmable Logic Device Family

File Size 453.49K  /  62 Page

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    EPM7256B EPM7128B EPM7064B EPM7032B EPM7512B MAX7000B

ALTERA[Altera Corporation]
Part No. EPM7256B EPM7128B EPM7064B EPM7032B EPM7512B MAX7000B
OCR Text ...PLDs ranging from 600 to 10,000 usable gates - 3.5-ns pin-to-pin logic delays with counter frequencies in excess of 303.0 MHz Advanced 2.5-V in-system programmability (ISP) - Programs through the built-in IEEE Std. 1149.1 Joint Test Action ...
Description PROGRAMMABLE LOGIC DEVICE

File Size 432.63K  /  66 Page

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    OR3LP26B

AGERE[Agere Systems]
Part No. OR3LP26B
OCR Text ...able FPGA Logic Device OR3LP26B usable Gates 60K--120K Number of Number of Max User Max User LUTs Registers RAM I/Os 4032 5304 64K 259 Array Size 18 x 28 Number of PFUs 504 The embedded core and interface comprise approximately 85K stan...
Description Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface

File Size 3,117.88K  /  184 Page

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    AMP2009 AMP2109 AMP1009 AMP1109

Nais(Matsushita Electri...
NAIS[Nais(Matsushita Electric Works)]
Part No. AMP2009 AMP2109 AMP1009 AMP1109
OCR Text ...age range (2.6 to 5.5 V DC) The usable range extends from a standard 5 V DC for microcomputers to 3 V DC and 4.5 V DC for battery operation. Ex. AMP 0 9 Lead wire 0: No lead wire type Operating voltage 9: 2.6 to 5.5 V DC AMP Series * Va...
Description MOTION-DETECTING SENSOR

File Size 518.01K  /  4 Page

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    QL2003 QL2003_DS QL2003-0PF100C QL2003-0PF100I QL2003-0PF144C QL2003-0PF144I QL2003-0PL84I QL2003-1PF100I QL2003-1PL84C

List of Unclassifed Manufacturers
ETC
QuickLogic Corp.
Part No. QL2003 QL2003_DS QL2003-0PF100C QL2003-0PF100I QL2003-0PF144C QL2003-0PF144I QL2003-0PL84I QL2003-1PF100I QL2003-1PL84C QL2003-2PF144C QL2003-2PL84C QL2003-2PL84I QL2003-XPF144I QL2003-XPL84C QL2003-1PF100C QL2003-1PF144I QL2003-1PL84I QL2003-2PF100I QL2003-XPF100C QL2003-0PL84C QL2003-XPF144C QL2003-1PF144C QL2003-2PF100C QL2003-2PF144I QL2003-XPF100I QL2003-XPL84I
OCR Text ...bility in One Device ... 3,000 usable ASIC gates, 118 I/O pins -16-bit counter speeds exceeding 200 MHz -3,000 usable ASIC gates, 5,000 usable PLD gates, 118 I/Os -3-layer metal ViaLink(R) process for small die sizes -100% routable and pi...
Description 3.3V and 5.0V pASIC2 FPGA combining speed, density, low cost and flexibility.
3.3V and 5.0V pASICò 2 FPGA
From old datasheet system
3.3V AND 5.0V PASIC-R 2 FPGA COMBINING SPEED, DENSITY, LOW COST AND FLEXIBILITY
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(高速,高可用密度,低成本、可适应性强.3V.0V pASIC 2系列场可编程逻辑器件)
FPGA, 192 CLBS, 5000 GATES, 200 MHz, PQCC84

File Size 329.53K  /  10 Page

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    Fujitsu
Part No. MB89145 MB89146 E712522
OCR Text ...of timers 8-bit PWM timer (also usable as a reload timer) 12-bit MPG timer (also usable as a PPG output, PWM output, and reload timer) 8/16-bit timer (also usable as two 8-bit timers) 21-bit time-base timer * One serial interface Swichable ...
Description F 2 MC-8L MB89140 Series
From old datasheet system

File Size 432.36K  /  50 Page

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    XILINX
Part No. XC9500XL
OCR Text ...88 macrocells, with 800 to 6400 usable gates Features * Optimized for high-performance 3.3V systems * 5 ns pin-to-pin logic delays, with internal system frequency up to 208 MHz Small footprint packages including VQFPs, TQFPs and CSPs (C...
Description XC9500XL High-Performance CPLD Family

File Size 136.53K  /  17 Page

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    STMicroelectronics N.V.
Atmel Corp
Part No. AT40K05 AT40K05LV AT40K10LV AT40K20LV AT40K40LV
OCR Text ...AT40K/AT40KLV Family(1) Device usable Gates Rows x Columns Cells Registers RAM Bits I/O (Maximum) Note: AT40K05 AT40K05LV 5K - 10K 16 x 16 256 256(1) 2,048 128 AT40K10 AT40K10LV 10K - 20K 24 x 24 576 576(1) 4,608 192 AT40K20 AT40K20LV 20K ...
Description AT40K05/10/20/40(LV) Summary [Updated 5/02. 4 Pages] 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. AT40K05/10/20/40(吕)摘要[更新5 / 024页] 5K - 5万门的FPGA与DSP优化的核心细胞和分布式FreeRam
From old datasheet system

File Size 54.84K  /  4 Page

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    AT40K10LV AT40K40 AT40K40-2EQC AT40K40-2BGC AT40K20LV-3AQC AT40K10LV-3RQI AT40K10LV-3DQI AT40K10LV-3CQC AT40K10LV-3AQC A

ATMEL[ATMEL Corporation]
Part No. AT40K10LV AT40K40 AT40K40-2EQC AT40K40-2BGC AT40K20LV-3AQC AT40K10LV-3RQI AT40K10LV-3DQI AT40K10LV-3CQC AT40K10LV-3AQC AT40K05LV-3DQI AT40KXX AT40K AT40K05 AT40K05-2AJC AT40K05-2AJI AT40K05-2AQC AT40K05-2AQI AT40K05-2BQC AT40K05-2BQI AT40K05-2CQC AT40K05-2CQI AT40K05-2DQC AT40K05-2DQI AT40K05-2RQC AT40K05-2RQI AT40K05LV AT40K05LV-3AJC AT40K05LV-3AJI AT40K05LV-3AQC AT40K05LV-3AQI AT40K05LV-3BQC AT40K05LV-3BQI AT40K05LV-3CQC AT40K05LV-3CQI AT40K05LV-3DQC AT40K05LV-3RQC AT40K05LV-3RQI AT40K10 AT40K10-2AJC AT40K10-2AJI AT40K10-2AQC AT40K10-2AQI AT40K10-2BQC AT40K10-2BQI AT40K10-2CQC AT40K10-2CQI AT40K10-2DQC AT40K10-2DQI AT40K10-2RQC AT40K10-2RQI AT40K10LV-3AJC AT40K10LV-3AJI AT40K10LV-3AQI AT40K10LV-3BQC AT40K10LV-3BQI AT40K10LV-3CQI AT40K10LV-3DQC AT40K10LV-3RQC AT40K20 AT40K20-2AJC AT40K20-2AJI AT40K20-2AQC AT40K20-2AQI AT40K20-2BQC AT40K20-2BQI AT40K20-2CQC AT40K20-2CQI AT40K20-2DQC AT40K20-2DQI AT40K20-2EQC AT40K20-2EQI AT40K20-2RQC AT40K20-2RQI AT40K20LV AT40K20LV-2EQC AT40K20LV-2EQI AT40K20LV-3AJC AT40K20LV-3AJI AT40K20LV-3AQI AT40K20LV-3BQC AT40K20LV-3BQI AT40K20LV-3CQC AT40K20LV-3CQI AT40K20LV-3DQC AT40K20LV-3DQI AT40K20LV-3RQC AT40K20LV-3RQI AT40K40-2BGI AT40K40-2BQC AT40K40-
OCR Text ...AT40K/AT40KLV Family(1) Device usable Gates Rows x Columns Cells Registers RAM Bits I/O (Maximum) Note: AT40K05 AT40K05LV 5K - 10K 16 x 16 256 256(1) 2,048 128 AT40K10 AT40K10LV 10K - 20K 24 x 24 576 576(1) 4,608 192 AT40K20 AT40K20LV 20K ...
Description From old datasheet system
5K - 50K Gates Coprocessor FPGA with FreeRAM

File Size 697.77K  /  67 Page

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    Atmel corp
Part No. AT40KELNBSP AT40KEL
OCR Text ... Table 1. AT40KAL/EL Device usable Gates Rows x Columns Cells Registers RAM Bits I/O (max) Note: AT40KAL040 40K - 50K 48 x 48 2,304 3,048 (1) AT40KEL040 40K - 50K 48 x 48 2,304 3,048(1) 18,432 384 18,432 384 1. Packages with F...
Description Rad Tolerant FPGAs with FreeRAM
From old datasheet system

File Size 451.96K  /  40 Page

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