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ecl lvpecl lvds Datasheet PDF File

For ecl lvpecl lvds Found Datasheets File :: 338 Search Time::3.016ms
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				ONSEMI[ON Semiconductor]
Part No.	NB6L16D NB6L16DTR2G NB6L16 NB6L16DG NB6L16DR2 NB6L16DR2G NB6L16DT NB6L16DTG NB6L16DTR2
OCR Text	... is a high precision, low power ecl differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to t...LVPecl (Positive ecl), LVTTL, LVCMOS, CML, or lvds. Outputs are 800 mV ecl signals. The VBB pin, an ...
Description	2.5V/3.3V Multilevel Input to Differential LVPecl/LVNecl Clock or Data Receiver/Driver/Translator Buffer(2.5V/3.3V多级输入到差分LVPecl/LVNecl时钟或数据输出接收器/驱动 2.5V / 3.3V Multilevel Input to Differential LVPecl/LVNecl Clock or Data Receiver/Driver/Translator Buffer
File Size	117.51K / 12 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB4L52MNR2G NB4L52MNG NB4L52_07 NB4L52 NB4L5207
OCR Text	...EE Q Q VCC VTR R R VTR EP I/O - ecl, CML, LVCMOS, lvds, LVTTL Input ecl, CML, LVCMOS, lvds, LVTTL Input - - ecl, CML, LVCMOS, lvds, LVTTL In...LVPecl OUTPUTS (VCC = 2.375 V to 5.5 V, VEE = 0 V or VCC = 0 V, VEE = -2.375 to -5.5 V, TA = -40C t...
Description	2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPecl Translator w/ Internal Termination
File Size	127.11K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB100LVEP91DW NB100LVEP91 NB100LVEP91MNR2 NB100LVEP91DWR2 NB100LVEP91MN NB100LVEP91-D
OCR Text	...ND NC FUNCTION Any Level Inputs ecl Outputs Pecl Reference Voltage Output Positive Supply (2.5 V, 3.3 V) Negative Supply (-2.5 V, -3.3 V, -5...LVPecl INPUT DC CHARACTERISTICS VCC = 2.5 V, VEE = -2.375 to -5.5 V, GND = 0 V (Note 3) -40 C Symbo...
Description	2.5V / 3.3V AnyLevel Positive Input to -2.5V / -3.3V / -5V Necl Output Translator 2.5V / 3.3V Any Level Positive Input to -2.5V -3.3V / -5V Necl Output Translator From old datasheet system
File Size	76.20K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVELT23D MC100LVELT23DR2G MC100LVELT23DTRG MC100LVELT23 MC100LVELT23DG MC100LVELT23DR2 MC100LVELT23DT MC100LVELT23DTR2
OCR Text	...lator. Because LVPecl (Positive ecl) or lvds levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which require the translation of a cl...
Description	3.3 V Dual Differential LVPecl/lvds to LVTTL Translator
File Size	67.01K / 8 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NB4L52MNG
OCR Text	...mination pin. (see table 4) 2 d ecl, cml, lvcmos, lvds, lvttl input noninverted differential input. (note 1) 3 d ecl, cml, lvcmos, lvds, lvt...lvpecl outputs (v cc = 2.375 v to 5.5 v, v ee = 0 v or v cc = 0 v, v ee = ? 2.375 to ? 5.5 v, ...
Description	2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop
File Size	135.60K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVELT2306 MC100LVELT23MNR4G MC100LVELT23 MC100LVELT23D MC100LVELT23DG MC100LVELT23DR2 MC100LVELT23DR2G MC100LVELT23DT MC100LVELT23DTG MC100LVELT23DTR2 MC100LVELT23DTRG MC100LVELT23MNR4
OCR Text	...lator. Because LVPecl (Positive ecl) or lvds levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which require the translation of a cl...
Description	3.3 V Dual Differential LVPecl/lvds to LVTTL Translator
File Size	134.71K / 8 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	ICS8S89874I 8S89874BKILFT
OCR Text	... boards. features ? two lvpecl/ecl output pairs ? frequency divide select options: 1 (pass through), 2, 4, 8, 16 ? in, nin input can accept the following differential input levels: lvpecl, lvds, cml ? output frequency: 2ghz (maximum) ? ...
Description	1:2 Differential-to-LVPecl Buffer/Divider
File Size	684.89K / 19 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NB100ELT23LDR2G
OCR Text	...lator. because lvpecl (positive ecl) or lvds levels are used, only +3.3 v and ground are required. the small outline 8-lead package and the dual gate design of the elt23l makes it ideal for applications which require the translation of a cl...
Description	3.3V Dual Differential LVPecl/lvds to LVTTL Translator DUAL Pecl TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8
File Size	143.59K / 8 Page	View it Online	Download Datasheet

				Linear Technology, Corp.
Part No.	MC100EPT23
OCR Text	...ator. because lvpecl (positive ecl) or lvds levels are used, only +3.3 v and ground are required. the small outline 8-lead package and the dual gate design of the ept23 makes it ideal for applications which require the translation of a cl...
Description	3.3V Dual Differential LVPecl/lvds to LVTTL Translator(3.3V差分双路LVPecl/lvds到LVTTL转换 3.3V双差分LVPecl / lvds到LVTTL翻译器（3.3V差分双路的LVPecl / lvds的到LVTTL转换器）
File Size	82.56K / 8 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NB100LVEP224FAG
OCR Text	...224 2.5v/3.3v 1:24 differential ecl/pecl clock driver with clock select and output enable description the nb100lvep224 is a low skew 1-to-24...lvpecl mode. this allows the lvep224 to be used for high performance clock distribution in +3.3 v or...
Description	2.5V/3.3V 1:24 Differential ecl/Pecl Clock Driver with Clock Select and Output Enable 100LVE SERIES, LOW SKEW CLOCK DRIVER, 24 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
File Size	122.95K / 10 Page	View it Online	Download Datasheet

For ecl lvpecl lvds Found Datasheets File :: 338 Search Time::3.016ms
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