| Description |
COVER 256K X 1 configuration MEMORY, PDSO20
FPGA configuration Memory 256K X 1 configuration MEMORY, PDSO20
CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN 1M X 1 configuration MEMORY, PDIP8
GIGATRUE 550 CAT6 PATCH 100 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 25 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 50 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 15 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 10 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 30 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 20 FT, NON BOOT, ORANGE
AT17N/256/512/010/002/040 [Updated 5/03. 18 Pages]
512K-bit FPGA configuration EEPROM 3.3V
256K-bit FPGA configuration EEPROM 3.3V
4M-bit FPGA configuration EEPROM 3.3V
1M-bit FPGA configuration EEPROM 3.3V
2M-bit FPGA configuration EEPROM 3.3V
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