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Integrated Device Techn...
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| Part No. |
5P49V5901
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| OCR Text |
...ential i/os - lvpecl, lvds and hcsl ? input frequency ranges: ? lvcmos reference clock in put (xin/ref) ? 1mhz to 200mhz ? lvds, lvpecl, hcsl differe ntial clock input (clkin, clkinb) ? 1mhz to 350mhz ? crystal frequency range: 8mhz to 4... |
| Description |
Generates up to four independent output frequencies
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| File Size |
445.52K /
37 Page |
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it Online |
Download Datasheet
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0541
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| OCR Text |
...s ? 5 - 1-167mhz low-power (lp) hcsl dif pairs w/zo=100 ? key specifications ? dif additive cycle-to-cycle jitter <5ps ? dif output-to-ou...lvds rs rs low-power hcsl differential output test load 2pf 2pf 5 inches zo=100 ? note: the device c... |
| Description |
slew rate for each output
hcsl-compatible differential input
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| File Size |
186.14K /
16 Page |
View
it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0531
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| OCR Text |
...s ? 5 - 1-167mhz low-power (lp) hcsl dif pairs key specifications ? dif additive cycle-to-cycle jitter <5ps ? dif output-to-output skew <...lvds rs rs low-power differential output test load 2pf 2pf 5 inches zo=100ohm note: the device can d... |
| Description |
slew rate for each output
hcsl-compatible differential input
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| File Size |
179.36K /
16 Page |
View
it Online |
Download Datasheet |
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ICS
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| Part No. |
ICS85408I
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| OCR Text |
...ls: LVPECL, lvds, LVHSTL, SSTL, hcsl * Maximum output frequency: 700MHz * Translates any differential input signal (LVPECL, LVHSTL, SSTL, hcsl) to lvds levels without external bias networks * Translates any single-ended input signal to lvds... |
| Description |
Low Skew, 1-to-8 Differential-to-lvds Fanout Buffer. Industrial Temp.
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| File Size |
160.19K /
12 Page |
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it Online |
Download Datasheet |
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ICS
Integrated Circuit Systems
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| Part No. |
ICS85408 ICS85408BG ICS85408BGLF ICS85408BGLFT ICS85408BGT
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| OCR Text |
...ls: LVPECL, lvds, LVHSTL, SSTL, hcsl * Maximum output frequency: 700MHz * Translates any differential input signal (LVPECL, LVHSTL, SSTL, hcsl) to lvds levels without external bias networks * Translates any single-ended input signal to lvds... |
| Description |
Low Skew, 1-to-8, Differential-to-lvds Fanout Buffer
LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-lvds CLOCK DISTRIBUTION CHIP
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| File Size |
168.14K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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