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MAXIM - Dallas Semiconductor
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| Part No. |
DS21610 DS21610QN DS21610SN
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| OCR Text |
...N and CLKOUT1 and CLKOUT2 to be phased-locked to that sync pulse. This causes the clocks to have a fixed alignment at the frame-sync boundaries. The signal applied to SYNCIN can be 8kHz or some integer subrate such as 1kHz, 2kHz, or 4kHz. P... |
| Description |
3.3V/5V Clock Rate Adapter
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| File Size |
303.65K /
15 Page |
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| Part No. |
UC2634DW UC2634J UC2634Q
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| OCR Text |
...heet) design example: precision phased locked frequency control of a 2-phase motor at 3600 rpm. using the commutation logic on the uc3634, a simple discrete drive scheme is possible. unitrode integrated circuits 7 continental bl vd. ... |
| Description |
Analog Phase-Locked Loop
Iso high side smart power solid state relay
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| File Size |
283.58K /
5 Page |
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Zarlink Semiconductor, Inc.
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| Part No. |
ZL30416
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| OCR Text |
...iption the zl30416 is an analog phased-locked loop which prov ides rate conversion and jitter attenuation for sonet/sdh oc-192/stm-64, oc-48/st m-16, oc-12/stm-4 and oc-3/stm-1 applications. a functional block diagram of the zl30416 is sho... |
| Description |
SONET/SDH Clock Multiplier PLL SONET / SDH的时钟倍频锁相
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| File Size |
333.05K /
22 Page |
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ICS
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| Part No. |
MK2049-34A MK2049-34SAILF
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| OCR Text |
Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for t... |
| Description |
77.76 MHz, OTHER CLOCK GENERATOR, PDSO20
3.3 Volt Communications Clock VCXO PLL
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| File Size |
84.11K /
8 Page |
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it Online |
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Price and Availability
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