| OCR Text |
...,536 Maximum Available User I/O 182 202 263 289 329 Maximum Differential I/O Pairs 84 86 114 120 120 Distributed RAM Bits 24,576 38,400 55,296 75,264 98,304 Block RAM Bits 32K 40K 48K 56K 64K
Device XC2S50E XC2S100E XC2S150E XC2S200E XC2... |
| Description |
Second generation ASIC replacement technology
CLAMP FPGA, 600 CLBS, 37000 GATES, 357 MHz, PBGA456
CLAMP FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456
Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 400 MHz, PQFP208
Spartan-IIE 1.8V FPGA Family FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP144
Spartan-IIE 1.8V FPGA Family FPGA, 864 CLBS, 52000 GATES, 357 MHz, PQFP208
Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP144
Spartan-IIE 1.8V FPGA Family FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456
Spartan-IIE 1.8V FPGA Family 的Spartan - IIE 1.8V的FPGA系列
Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PBGA256
Spartan-IIE 1.8V FPGA Family Spartan - IIE 1.8V的FPGA系列
Spartan-IIE 1.8V FPGA Family: Introduction and Ordering Information
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