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Cypress
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Part No. |
CY7C1355V25 CY7C1357V25 7C1355V
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OCR Text |
...Y ARRAY D Data-In REG. Q
DQx dpx
CY7C1355 AX DQX dpx BWS X X = 17:0 X= a, b, c, d X = a, b, c, d X = a, b, c, d
CY7C1357 X = 18:0 X = a, b X = a, b X = a, b
OE
Selection Guide
7C1355V25-133 7C1357V25-133 Maximum Access Time ... |
Description |
256Kx36/512Kx18 Flow-Thru SRAM with NoBL Architecture From old datasheet system
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File Size |
334.51K /
26 Page |
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it Online |
Download Datasheet
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Infineon
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Part No. |
AP164601
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OCR Text |
...x and a Port Direction register dpx. Each port pin is individually bit-addressable and configurable. The value in the direction register determines whether the corresponding port pin is configured as output (output driver(s) enabled) or inp... |
Description |
Port Initialization and Direction Control From old datasheet system
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File Size |
60.07K /
7 Page |
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it Online |
Download Datasheet
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CYPRESS[Cypress Semiconductor]
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Part No. |
CY7C1371B CY7C1371B-100BGC CY7C1371B-100BGI CY7C1373B-83BZI CY7C1371B-100AC CY7C1371B-100AI CY7C1371B-100BZC CY7C1371B-100BZI CY7C1371B-117AC CY7C1371B-117BGC CY7C1371B-117BZC CY7C1371B-83AC CY7C1371B-83AI CY7C1371B-83BGC CY7C1371B-83BGI CY7C1371B-83BZC CY7C1371B-83BZI CY7C1373B CY7C1373B-100AC CY7C1373B-100AI CY7C1373B-100BGC CY7C1373B-100BGI CY7C1373B-100BZC CY7C1373B-100BZI CY7C1373B-117AC CY7C1373B-117BGC CY7C1373B-117BZC CY7C1373B-83AC CY7C1373B-83AI CY7C1373B-83BGC CY7C1373B-83BGI CY7C1373B-83BZC
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OCR Text |
...8:0
CY7C1373 X = 19:0
DQx dpx
X= a, b, c, d X = a, b
dpx X = a, b, c, d X = a, b BWSX X = a, b, c, d X = a, b
OE
Selection Guide
Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current 117 MHz 7.5 250 2... |
Description |
512K x 36/1M x 18 Flow-Thru SRAM with NoBL Architecture
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File Size |
719.76K /
26 Page |
View
it Online |
Download Datasheet
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Price and Availability
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