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  ecl lvpecl lvds Datasheet PDF File

For ecl lvpecl lvds Found Datasheets File :: 308    Search Time::2.078ms    
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    ICS
Part No. ICS853111-02
OCR Text ecl FANOUT BUFFER FEATURES * 10 differential 2.5V/3.3V LVPecl / ecl outputs * 2 selectable differential input pairs * PCLKx, nPCLKx pairs can accept the following differential input levels: LVPecl, lvds, CML, SSTL * Maximum output frequen...
Description Low Skew, 1-to-10, Differential-to-LVPecl Fanout Buffer. Industrial Temperature.
From old datasheet system

File Size 198.59K  /  17 Page

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    ICST[Integrated Circuit Systems]
Part No. ICS853111B ICS853111BYT ICS853111BY ICS853111BYLF ICS853111BYLFT
OCR Text ecl FANOUT BUFFER FEATURES * 10 differential 2.5V/3.3V LVPecl / ecl outputs * 2 selectable differential input pairs * PCLKx, nPCLKx pairs can accept the following differential input levels: LVPecl, lvds, CML, SSTL * Maximum output frequen...
Description LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPecl/ecl FANOUT BUFFER
From old datasheet system
Low Skew, 1-to-10, Differential-to-LVPecl Fanout Buffer. Improved Performance

File Size 204.37K  /  18 Page

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    ICS
Part No. ICS8737I-11 ICS8737-11I
OCR Text ... follower outputs that generate ecl/LVPecl compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed to drive Zo = 50 5 2 Zo FOUT FIN Zo =...
Description Low Skew, ÷1, ÷2 Clock Generator. Industrial Temperature.
From old datasheet system

File Size 98.98K  /  14 Page

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    ICS853058AG ICS853058AGT ICS853058

ICST[Integrated Circuit Systems]
Part No. ICS853058AG ICS853058AGT ICS853058
OCR Text ecl CLOCK MULTIPLEXER FEATURES * High speed 8:1 differential multiplexer * 1 differential 3.3V or 2.5V LVPecl output * 8 selectable differential PCLK, nPCLK inputs * PCLKx, nPCLKx pairs can accept the following differential input levels: ...
Description 8:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPecl/ecl CLOCK MULTIPLEXER

File Size 191.36K  /  15 Page

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    NB4L52

ON Semiconductor
Part No. NB4L52
OCR Text ...EE Q Q VCC VTR R R VTR EP I/O - ecl, CML, LVCMOS, lvds, LVTTL Input ecl, CML, LVCMOS, lvds, LVTTL Input - - ecl, CML, LVCMOS, lvds, LVTTL In...LVPecl OUTPUTS (VCC = 2.375 V to 5.5 V, VEE = 0 V, TA = -40C to +85C) Symbol IEE VOH Characteristic...
Description 2.5 to 5.5V ecl D-Flip-flop w/Diff Reset & Input Terms
From old datasheet system

File Size 66.58K  /  8 Page

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    ONSEMI[ON Semiconductor]
Part No. NB6L11 NB6L11DTR2 NB6L11D NB6L11DR2 NB6L11DT
OCR Text ...or lvds. The outputs are 800 mV ecl signals. * Maximum Input Clock Frequency w 6 GHz Typical * Maximum Input Data Rate w 6 Gb/s Typical * Lo...LVPecl, LVNecl, LCMOS, LVTTL and CML Input Compatible *For additional marking information, refer...
Description 2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPecl/LVNecl 1:2 CLOCK OR DATA FANOUT BUFFER / TRANSLATOR 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
6GHz 2.5V/3.3V Multilevel Input to Differential LVNecl/LVPecl 1:2 Clock or Data Fanout Buffer/Transl
From old datasheet system

File Size 112.11K  /  12 Page

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    on
Part No. NB6L16
OCR Text ... is a high precision, low power ecl differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to t...LVPecl (Positive ecl), LVTTL, LVCMOS, CML, or lvds. Outputs are 800 mV ecl signals. The VBB pin, an ...
Description 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential LVecl Clock or Data Translator/Receiver/Drive
From old datasheet system

File Size 112.87K  /  12 Page

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    NB7L32M NB7L32MMNG NB7L32MMNR2G

ONSEMI[ON Semiconductor]
Part No. NB7L32M NB7L32MMNG NB7L32MMNR2G
OCR Text ...ors and accept LVPecl (Positive ecl), CML, or lvds. The high frequency reset pin is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple NB7L32M...
Description 2.5V/3.3V, 14GHz 梅2 Clock Divider w/CML Output and Internal Termination(w/CML杈??????ㄧ?绔??2.5V/3.3V, 14GHz 梅2?堕??????
2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination(w/CML输出和内部终端,2.5V/3.3V, 14GHz ÷2时钟分频
From old datasheet system
2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Output and Internal Termination

File Size 171.32K  /  11 Page

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For ecl lvpecl lvds Found Datasheets File :: 308    Search Time::2.078ms    
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