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PhaseLink
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| Part No. |
PLL205-03
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| OCR Text |
...p cpu, and power down mode from i2c programming. support 2-wire i2c serial bus interface with built- in vendor id, device id and revision...sst pll2 pd 48mhz vdd4 24_48mhz sdramin ? 2 cput1
pll205-03 motherboard clock generator for ... |
| Description |
Motherboard Clock Generator
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| File Size |
268.38K /
13 Page |
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it Online |
Download Datasheet
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PhaseLink
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| Part No. |
PLL205-04
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| OCR Text |
... pci output drive selectable by i2c. one 48mhz clock and 24_48mhz clock via i2c. three 3.3v agp clocks. three 14.318mhz reference c...sst control logic vdd1 ref(0:1) vdd4 agp (0:2) pci (0:8) pci9_e vdd3 vdd2 pll2 ? 2 ref_f cput0 cpuc0... |
| Description |
Programmable Clock Generator
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| File Size |
262.37K /
12 Page |
View
it Online |
Download Datasheet |
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PhaseLink
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| Part No. |
PLL205-11
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| OCR Text |
... to stop cpu. support 2-wire i2c serial bus interface with built- in vendor id, device id and revision id. single byte micro-step line...sst i2c logic sdata sclk watch dog cpuc0 wdreset cput(0:1) sdram12 gnd sdram0 sdram1 vdd3 sdram2 sdr... |
| Description |
Motherboard Clock Generator
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| File Size |
164.52K /
14 Page |
View
it Online |
Download Datasheet |
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PhaseLink
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| Part No. |
PLL205-13
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| OCR Text |
...p cpu, and power down mode from i2c programming. support 2-wire i2c serial bus interface with built- in vendor id, device id and revision...sst pll2 pd 48mhz vdd4 24_48mhz sdramin ? 2 cput1 wdreset
pll205-13 motherboard clock genera... |
| Description |
Motherboard Clock Generator
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| File Size |
296.43K /
14 Page |
View
it Online |
Download Datasheet |
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PhaseLink
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| Part No. |
PLL205-14
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| OCR Text |
... pci output drive selectable by i2c. one 48mhz clock and 24_48mhz clock via i2c. three 14.318mhz reference clocks. power management...sst control logic vdd1 ref(0:1) vdd4 agp (0:2) pci (0:8) pci9_e vdd3 vdd2 pll2 ? 2 ref_f cput0 cpuc0... |
| Description |
Programmable Clock Generator
|
| File Size |
288.85K /
13 Page |
View
it Online |
Download Datasheet |
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PhaseLink
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| Part No. |
PLL205-16
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| OCR Text |
... pci output drive selectable by i2c. one 48mhz clock and 24_48mhz clock vi a i2c. three 14.318mhz reference clocks. power man...sst control logic vdd1 ref(0:1) vdd4 agp (0:2) pci (0:8) pci9_e vdd3 vdd2 pll2 ? 2 ref_f cput0 cpuc0... |
| Description |
Programmable Clock Generator
|
| File Size |
272.38K /
16 Page |
View
it Online |
Download Datasheet |
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