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Zarlink Semiconductor
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| Part No. |
ZL50404GDC
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| OCR Text |
...yte frames ? l2 switching ? mac address self learning, up to 4 k mac addresses using internal table ? supports the following spanning stand...programmable ports, including one programmable range ? the precedence of the above classifications i... |
| Description |
Lightly managed/unmanaged 5-port 10/100M ethernet switch.
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| File Size |
704.73K /
121 Page |
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Zarlink Semiconductor
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| Part No. |
ZL50400GDC
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| OCR Text |
...yte frames ? l2 switching ? mac address self learning, up to 4 k mac addresses using internal table ? supports the following spanning stand...programmable ports, including one programmable range ? the precedence of the above classifications i... |
| Description |
Lightly managed/unmanaged 9-port 10/100M ethernet switch.
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| File Size |
707.40K /
122 Page |
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it Online |
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FREESCALE SEMICONDUCTOR INC
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| Part No. |
XPC850CZT66BU XPC850CZT80B
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| OCR Text |
...ytes, and 8 mbytes; 16 virtual address spaces and eight protection groups advanced on-chip emulation debug mode data bus dynamic bus si...programmable read-only memory (eprom), flash eprom, etc. ? memory controller programmable to suppor... |
| Description |
32-BIT, 66 MHz, RISC PROCESSOR, PBGA256
32-BIT, 80 MHz, RISC PROCESSOR, PBGA256
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| File Size |
1,162.26K /
72 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2512404SBI6I
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| OCR Text |
...tem clock. all of the control, address, circuits are synchronized with the positive edge of an externally supplied clock. i/o transactions ...programmable and are determined by address bits a 0 ?a 3 during the mode register set command. burs... |
| Description |
128M X 4 DDR DRAM, 0.7 ns, PDSO66
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| File Size |
924.79K /
61 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2256164SCE5B
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| OCR Text |
...tem clock. all of the control, address, circuits are synchronized with the positive edge of an externally supplied clock. i/o transactions ...programmable and are determined by address bits a 0 ?a 3 during the mode register set command. burs... |
| Description |
16M X 16 DDR DRAM, 0.65 ns, PDSO66
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| File Size |
917.36K /
61 Page |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2256164SCE5BI
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| OCR Text |
...tem clock. all of the control, address, circuits are synchronized with the positive edge of an externally supplied clock. i/o transactions ...programmable and are determined by address bits a 0 ?a 3 during the mode register set command. burs... |
| Description |
16M X 16 DDR DRAM, 0.65 ns, PDSO66
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| File Size |
915.14K /
61 Page |
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it Online |
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Mosel Vitelic
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| Part No. |
V54C365164VL
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| OCR Text |
...echarge command random column address every clk (1-n rule) suspend mode and power down mode auto refresh and self refresh refresh interval: 4096 cycles/64 ms available in 54 pin 400 mil tsop-ii lvttl interface single +3.3 v 0... |
| Description |
HIGH PERFORMANCE 225/200/166/143 MHz 3.3 VOLT 4M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16
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| File Size |
706.89K /
56 Page |
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it Online |
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SILICON STORAGE TECHNOLOGY INC
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| Part No. |
SST26VF016-80-5C-S2AF
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| OCR Text |
...p-around ? index jump ? jump to address index within 256 byte page ? jump to address index within 64 kbyte block ? jump to address index to ...programmable (otp) 256 bit, secure id - 64 bit unique, factory pre-programmed iden- tifier - 192 bi... |
| Description |
16M X 1 FLASH 2.7V PROM, PDSO8
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| File Size |
800.30K /
34 Page |
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it Online |
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