| |
|
 |
DATA delay DEVICES INC
Data delay Devices, Inc.
|
| Part No. |
MDU12H-4MC3 MDU12H-250MC3 MDU12H-150MC3 MDU12H-30MC3 MDU12H-40C3 MDU12H-50C3 MDU12H-5MC3 MDU12H-125MC3 MDU12H-200M MDU12H-100C3 MDU12H-125M MDU12H-100MC3 MDU12H-125C3 MDU12H-150M MDU12H-200 MDU12H-200C3
|
| Description |
delay 200 /-10 ns, dual, ECL-interfaced fixed delay line
delay 150 /-7.5 ns, dual, ECL-interfaced fixed delay line
delay 250 /-12.5 ns, dual, ECL-interfaced fixed delay line
delay 125 /-6.2 ns, dual, ECL-interfaced fixed delay line
delay 100 /-5 ns, dual, ECL-interfaced fixed delay line
DUAL, ECL-INTERFACED FIXED delay LINE (SERIES MDU12H) ACTIVE delay LINE, TRUE OUTPUT, DSO16
|
| File Size |
35.40K /
4 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| Part No. |
ISPPACCLK5610AV-01TN48C ISPPACCLK5610AV-01TN48I ISPPACCLK5610AV-01T48C ISPPACCLK5610AV-01T48I ISPPACCLK5610AV-01TN100I ISPPAC-CLK5620AV-01TN100I ISPPAC-CLK5610AV-01T48C ISPPAC-CLK5610AV-01T48I ISPPAC-CLK5620AV-01T100C ISPPAC-CLK5620AV-01T100I ISPPAC-CLK5610AV-01TN48I ISPclock5610A
|
| Description |
In-System Programmable, Enhanced Zero-delay, clock Generator with Universal Fan-Out Buffer
5600 SERIES, PLL BASED clock DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 TQFP-100
5600 SERIES, PLL BASED clock DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 TQFP-48
clock GENERATOR, ISP, SMD, TQFP48; Frequency, clock:10MHz; Temp, op. min:0(degree C); Temp, op. max:70(degree C); Pins, No. of:48; Case style:TQFP / 48; Base number:5610; Packaging type:Peel Pack; Voltage, Vcc:3.3V; Temperature, RoHS Compliant: Yes
In-System Programmable, Enhanced Zero-delay, clock Generator with Universal Fan-Out Buffer
|
| File Size |
930.81K /
51 Page |
View
it Online |
Download Datasheet |
| |
|
|
Rectron Semiconductor
|
| Part No. |
NB2308AC1DTR2 NB2308AC1HD NB2308AC1DTG NB2308AC1DG NB2308AC1DR2G NB2308AC1HDG NB2308AC1HDR2 NB2308AC1HDT NB2308AI2HDR2G NB2308AI1DG NB2308AI1HDG NB2308AI5HDG NB2308AI4DTG NB2308AI3DR2G
|
| Description |
3.3V Eight Output Zero delay Buffer 2308 SERIES, PLL BASED clock DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V Eight Output Zero delay Buffer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48 2308 SERIES, PLL BASED clock DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3 V Zero delay clock Buffer 2308 SERIES, PLL BASED clock DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
| File Size |
189.31K /
12 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
