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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
IDT71T67902S80BG
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OCR Text |
...w-through outputs, single cycle deselect advance information idt71t67702 idt71t67902 data, address and control registers. there are no registers in the data output path (flow-through architecture). internal logic allows the sram to generat... |
Description |
512K X 18 CACHE SRAM, 8 ns, PBGA119
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File Size |
514.50K /
23 Page |
View
it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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Part No. |
CY7C1300A-83BGC
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OCR Text |
...ising edge of clock initiates a deselect cycle for port x. ce2x input- synchronous synchronous active high chip enable port x: ce2x is used with ce1x to enable port x of this device. ce2x sampled low at the rising edge of clock initiates... |
Description |
128K X 36 DUAL-PORT SRAM, 6 ns, PQFP176
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File Size |
148.65K /
15 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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