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DALLAS[Dallas Semiconductor]
DALLAS[Dallas Semiconducotr]
Maxim
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| Part No. |
DS3142 DS3144 DS3143N DS3144N DS3141 DS3141N DS3143
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| OCR Text |
...d 8-Bit Processor Port Supports muxed or Nonmuxed Bus Operation (Intel or Motorola) 3.3V Supply with 5V Tolerant I/O 144-Pin, 13mm x 13mm CSBGA Package IEEE 1149.1 JTAG Support
APPLICATIONS
SONET/SDH Muxes PDH Muxes Digital Cross-Connec... |
| Description |
Single/Dual/Triple/Quad DS3/E3 Framers
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| File Size |
1,071.06K /
88 Page |
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it Online |
Download Datasheet
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Philips
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| Part No. |
PNX8510
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| OCR Text |
...r input modes 2xD1, RGB, 1x 2D1 muxed, 24/30-bit RGB, DD1 Programmable generation of embedded analog and external digital sync signals compliant to VESA and SMPTE 274 standards VBI encoding for standard definition video out
Philips Semic... |
| Description |
Analog Companion Chip
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| File Size |
549.83K /
92 Page |
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it Online |
Download Datasheet |
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Philips
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| Part No. |
PNX8511
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| OCR Text |
... input modes (2xD1, RGB, 1x 2D1 muxed, 24/30-bit RGB, DD1...) Programmable generation of embedded analog and external digital sync signals compliant to VESA and SMPTE 274 standards VBI encoding for standard definition video out Teletext ins... |
| Description |
Analog Companion Chip
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| File Size |
459.53K /
84 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT723656
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| OCR Text |
...Retransmit pins RT1 and RT2 are muxed with the Partial Reset pins. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required... |
| Description |
CMOS TRIPLE BUS SyncFIFO?
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| File Size |
323.22K /
39 Page |
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it Online |
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IDT
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| Part No. |
IDT72V36104 IDT72V36103 IDT72V3694 IDT72V3693
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| OCR Text |
...Retransmit pins RT1 and RT2 are muxed with the Partial Reset pins. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required... |
| Description |
3.3 VOLT CMOS SyncBiFIFO?
3.3 VOLT CMOS SyncFIFO?
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| File Size |
594.63K /
36 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72V36106
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| OCR Text |
...Retransmit pins RT1 and RT2 are muxed with the Partial Reset pins. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required... |
| Description |
3.3 VOLT CMOS TRIPLE BUS SyncFIFO?
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| File Size |
613.19K /
39 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72V3656
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| OCR Text |
...Retransmit pins RT1 and RT2 are muxed with the Partial Reset pins. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required... |
| Description |
3.3 VOLT CMOS TRIPLE BUS SyncFIFO?
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| File Size |
608.22K /
39 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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