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Mitsubishi Electric Corporation
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Part No. |
MH32D72AKLA-75
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OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CLK and /CLK) - data ... |
Description |
Circular Connector; No. of Contacts:79; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:20; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:20-35 RoHS Compliant: No
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File Size |
335.19K /
38 Page |
View
it Online |
Download Datasheet
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Mitsubishi Electric Corporation
|
Part No. |
MH32D72AKLB-75 MH32D72AKLB-10
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OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
Circular Connector; No. of Contacts:41; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:20; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:20-41 RoHS Compliant: No JT 79C 79#22D SKT GRND PLUG
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File Size |
366.42K /
40 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH16D72AKLB-10
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
1,207.959,552-BIT (16,777,216-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
404.58K /
40 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH16D72AKLB-75
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
1,207.959,552-BIT (16,777,216-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
397.24K /
39 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH32D72AKLB-75 MH32D72AKLB-10
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
407.38K /
40 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH32D72KLH-10
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OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
398.60K /
40 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH32D72KLH-75
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
391.75K /
39 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Mitsubishi Electric Corporation
|
Part No. |
MH64D72KLH-10 MH64D72KLH-75
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OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
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File Size |
397.59K /
39 Page |
View
it Online |
Download Datasheet
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Price and Availability
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