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divide-by-5 Datasheet PDF File

For divide-by-5 Found Datasheets File :: 7433 Search Time::2.375ms
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				Mitel Semiconductor MITEL[Mitel Networks Corporation]
Part No.	MT8940AC MT8940AE
OCR Text	...ree state output) - This is the divide by two output of C4b (pin 13) and has a falling edge in the frame pulse (F0b) window. The high impedance state of this output is controlled by ENC2o (pin 16). Clock 2.048 MHz (Three state output) - Thi...
Description	T1/CEPT Digital Trunk PLL
File Size	204.10K / 16 Page	View it Online	Download Datasheet

				MITEL[Mitel Networks Corporation]
Part No.	MT8940 MT8940AE
OCR Text	...ree state output) - This is the divide by two output of C4b (pin 13) and has a falling edge in the frame pulse (F0b) window. The high impedance state of this output is controlled by ENC2o (pin 16). Clock 2.048 MHz (Three state output) - Thi...
Description	ISO-CMOS ST-BUSFAMILY T1/CEPT Digital Trunk PLL ISO-CMOS ST-BUS FAMILY T1/CEPT Digital Trunk PLL ISO-CMOS ST-BUS⑩ FAMILY T1/CEPT Digital Trunk PLL
File Size	116.52K / 16 Page	View it Online	Download Datasheet

				AMI[AMI SEMICONDUCTOR]
Part No.	FS6377-01G FS6377-01
OCR Text	... the equivalent binary value. A divide-by-256 can also be achieved by programming the eight bits to 00h. 3.1.2 Feedback Divider The feedback divider is based on a dual-modulus prescaler technique. The technique allows the same granularit...
Description	Programmable 3-PLL Clock Generator IC
File Size	350.44K / 21 Page	View it Online	Download Datasheet

				ALSC[Alliance Semiconductor Corporation]
Part No.	ASM3X2105AFTR ASM3X2105A ASM3X2105AFS ASM3X2105AFSR ASM3X2105AFT
OCR Text	...to select normal output mode or divide-by-2 output mode. When this pin is HIGH, the frequency of the output clock is the same as the input clock frequency. When it is tied LOW, the output frequency is half the input clock frequency. This pi...
Description	Low Frequency EMI Reduction
File Size	452.14K / 10 Page	View it Online	Download Datasheet

				List of Unclassifed Manufacturers ETC[ETC]
Part No.	FS8170
OCR Text	...65 multi-modulus prescaler with divide ratio range from 992 to 65631 for / 32/33 mode and from 4032 to 131135 for / 64/65 mode 14-bit progra...by the programmable divider and then internally output to the phase/frequency detector (PFD) as fV. ...
Description	2.5 GHz Low Power Phase-locked Loop IC
File Size	257.24K / 17 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	87339AMI-11LFT 87339AGI-11LFT
OCR Text	...iv_selb0 input pulldown selects divide value for bank b outputs as described in table 3. lvcmos / lvttl interface levels. 4 clk input pulldo...by the bias resistors r1, r2 and c1. this bias circuit should be located as close as possible to th...
Description	Low Skew, Differential-to-3.3V LVPECL Clock Generator
File Size	193.97K / 15 Page	View it Online	Download Datasheet

				NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
Part No.	74HCT390 74HC390 74HCT390D 74HC390PW 74HC390D 74HC390DB 74HC390N 74HCT390DB 74HCT390N 74HCT390PW 74HC390U 74HCT390U 74HC390NB
OCR Text	...ne package can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100 * Two master reset inputs to clear each decade counter individually * Output capability: standard * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT390 are high-spee...
Description	Dual decade ripple counter 74HC/HCT390; Dual decade ripple counter
File Size	49.13K / 7 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	5V19EE604NDGI8 IDT5V19EE604
OCR Text	...lated frequencies. each output divide supports 8-bit output-divider (pm and q[7:0]). the following equation governs how the output frequen...by using the pm bit. if the output is disabled, it will be driven high, low or high impedance, dep...
Description	EEPROM PROGRAMMABLE VCXO CLOCK GENERATOR
File Size	445.36K / 29 Page	View it Online	Download Datasheet

				NXP Semiconductors
Part No.	TSA5059 TSA5059T TSA5059TS
OCR Text	...for low phase noise selectable divide-by-two prescaler operation up to 2.7 ghz with and without divide-by-two prescaler selectable reference divider ratio compatible with uk-dtt (digital terrestrial television) offset requirements sele...
Description	2.7 GHz I2C-bus controlled low phase noise frequency synthesizer
File Size	156.99K / 24 Page	View it Online	Download Datasheet

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