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LATTICE
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Part No. |
ISPLSI1032
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OCR Text |
...elays through the GRP have been equalized to minimize timing skew. Clocks in the ispLSI 1032 device are selected using the Clock Distribution Network. Four dedicated clock pins (Y0, Y1, Y2 and Y3) are brought into the distribution network, ... |
Description |
In-System Programmable High Density PLD
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File Size |
195.93K /
16 Page |
View
it Online |
Download Datasheet
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Lattice Semiconductor Corporation LATTICE[Lattice Semiconductor] http://
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Part No. |
ISPLSI1024 ISPLSI1024EA-200LT100 1024EA ISPLSI1024EA-100LT100 ISPLSI1024EA-125LT100 ISPLSI1024EA ISPLS1024-100LT100 ISPLS1024-200LT100
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OCR Text |
...elays through the GRP have been equalized to minimize timing skew.
Clocks in the ispLSI 1024EA device are selected using the Clock Distribution Network. Four dedicated clock pins (Y0, Y1, Y2 and Y3) are brought into the distribution netw... |
Description |
200 MHz in-system prommable high density PLD Shielded Paired Cable; Number of Conductors:8; Conductor Size AWG:28; No. Strands x Strand Size:7 x 36; Jacket Material:Polyethylene; Number of Pairs:4; Features:Alumunium Foil Polyester/Tinned Copper Braid; Impedance:120ohm RoHS Compliant: Yes In-System Programmable High Density PLD 100 MHz in-system prommable high density PLD
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File Size |
159.21K /
13 Page |
View
it Online |
Download Datasheet
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Price and Availability
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