|
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
Part No. |
IDT72T51453L5BB
|
OCR Text |
...1 estr eren rdadd raden erclk 7 ren rclk functional block diagram
2 commercial and industrial temperature ranges idt72t51433/72t51443/72t51453 2.5v, multi-queue flow-control devices (16 queues) 18 bit wide configuration 589,824, 1,179,648... |
Description |
128K X 18 OTHER FIFO, 3.6 ns, PBGA256
|
File Size |
545.91K /
56 Page |
View
it Online |
Download Datasheet |
|
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
Part No. |
IDT72V51453L7-5BBG8 IDT72V51453L6BBG8
|
OCR Text |
...wclk paf n x9, x18 data in estr ren pae rdadd raden rclk pae n x9, x18 data out oe ov write control d in q out 8 8 8 7 read control write flags read flags 5939 drw01 functional block diagram
2 commercial and industrial temperature rang... |
Description |
128K X 18 OTHER FIFO, 4 ns, PBGA256 128K X 18 OTHER FIFO, 3.7 ns, PBGA256
|
File Size |
477.88K /
50 Page |
View
it Online |
Download Datasheet |
|
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
Part No. |
IDT72V51453L7-5BB8 IDT72V51453L6BB IDT72V51453L7-5BBGI
|
OCR Text |
...wclk paf n x9, x18 data in estr ren pae rdadd raden rclk pae n x9, x18 data out oe ov write control d in q out 8 8 8 7 read control write flags read flags 5939 drw01 functional block diagram
2 commercial and industrial temperature rang... |
Description |
128K X 18 OTHER FIFO, 4 ns, PBGA256 128K X 18 OTHER FIFO, 3.7 ns, PBGA256
|
File Size |
476.95K /
50 Page |
View
it Online |
Download Datasheet |
|
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
Part No. |
IDT72T51453L7-5BB IDT72T51453L7-5BBI
|
OCR Text |
...1 estr eren rdadd raden erclk 8 ren rclk data path flow diagram
2 commercial and industrial temperature ranges idt72t51433/72t51443/72t51453 2.5v, multi-queue fifo (16 queues) 18 bit wide configuration 589,824, 1,179,648 and 2,359,296 ... |
Description |
128K X 18 OTHER FIFO, PBGA256
|
File Size |
208.75K /
12 Page |
View
it Online |
Download Datasheet |
|
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
Part No. |
V805L15PFI9 V805L20PF V805L10PF
|
OCR Text |
...(rclk) and another enable pin ( ren ). the read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual- clock operation. an output enable pin ( oe ) is provided on the... |
Description |
256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 256 X 18 BI-DIRECTIONAL FIFO, 12 ns, PQFP128 256 X 18 BI-DIRECTIONAL FIFO, 6.5 ns, PQFP128
|
File Size |
324.56K /
26 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|