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TSH310 Z2SMA13 2N1924 UPC271 LT1320 150K6 EM92600C AU1PG
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  asychronous Datasheet PDF File

For asychronous Found Datasheets File :: 122    Search Time::3.25ms    
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    Eureka Microelectronics
Part No. EK7309
OCR Text ...outputs are forced high. XON is asychronous to SCLK. Output drive. These are the gate drive outputs.The high level is VGG and the low level is VEE. Positive supply voltage for LV logic . This is typically 3.3V. Negative supply voltage for L...
Description 256-Output Gate Driver /COF/2 Level

File Size 189.86K  /  15 Page

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    Samsung Electronics
Part No. K5L2731CAM-D770
OCR Text ...8 Words Page access allows fast asychronous read Page Read Access Time : 20ns * Read While Program/Erase Operation * Multiple Bank architectures (4 banks) Bank 0: 16Mbit (4Kw x 8 and 32Kw x 31) Bank 1: 48Mbit (32Kw x 96) Bank 2: 48Mbit (32K...
Description 128Mb NOR Flash 32Mb UtRAM

File Size 942.76K  /  65 Page

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    MAS9138A1SD06

Micro Analog systems
Part No. MAS9138A1SD06
OCR Text ... internal timing signal for the asychronous circuits. This internal timing signal (16T) is 16 times the TXC bit rate in order to sample the asynchronous data stream (TDI) at the proper Timing Circuits 16 x TXC every 8th character at max...
Description ASYNCHRONOUS TO SYNCHRONOUS CONVERTER

File Size 169.19K  /  10 Page

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    ICS9248-20 ICS9248F-20 AV9248F-20

ICST[Integrated Circuit Systems]
Part No. ICS9248-20 ICS9248F-20 AV9248F-20
OCR Text ... Timing Diagram CPUSTOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPUCLKs for low power operation. CPU_STOP# is synchronized by the ICS9248-20. The minimum that the CPUCLK is enabled (CPU_STOP# high puls...
Description Pentium/PRO system clock chip
Pentium/ProTM System Clock Chip

File Size 340.17K  /  11 Page

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    MT90220

Mitel Networks Corporat...
Mitel Networks Corporation
Part No. MT90220
OCR Text ...pport mib ? connects to popular asychronous sram ? provides statistics on the number of hec errors ? 8 bit microprocessor interface, compatible with intel and motorola ? 3.3v operation / 5v tolerant inputs ? mqfp-208 pin ? jtag test support...
Description Octal IMA/UNI PHY Device
IC, MICREL LDO 5A ADJ VLT REG TO-2

File Size 345.57K  /  116 Page

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    ICS9248-110 ICS9248YF-110 ICS9248YF-110LF

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-110 ICS9248YF-110 ICS9248YF-110LF
OCR Text ...Timing Diagram CPU_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPUCLKs for low power operation. CPU_STOP# is synchronized by the ICS9248-110. All other clocks will continue to run while the CPUCLKs cl...
Description K7; 750/760; System Clock Chip: 90 - 150MHz CPU
AMD-K7TM System Clock Chip
Frequency Generator & Integrated Buffers
115 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 150.77K  /  14 Page

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    IDT7200L IDT7201LA IDT7202LA

Intersil Corporation
Intersil, Corp.
Part No. IDT7200L IDT7201LA IDT7202LA
OCR Text asychronous fifo 256 x 9, 512 x 9, 1,024 x 9 idt7200l idt7201la idt7202la features: ? first-in/first-out dual-port memory ? 256 x 9 organization (idt7200) ? 512 x 9 organization (idt7201) ? 1,024 x 9 organization (idt7202) ? low power consu...
Description CMOS asychronous FIFO 256 x 9 Memory(CMOS异步先进先出256x 9位存储器)
CMOS asychronous FIFO 512 x 9 Memory(CMOS异步先进先出512x 9位存储器)
CMOS asychronous FIFO 1024 x 9 Memory(CMOS异步先进先出1024x 9位存储器) 的CMOS异步先进先出存储024 × 9的CMOS(异步先进先024x 9位存储器

File Size 148.71K  /  13 Page

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    ICS9248-103 ICS9248YF-103 ICS9248F-103

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS9248-103 ICS9248YF-103 ICS9248F-103
OCR Text ...Timing Diagram CLK_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power operation. CLK_STOP# is synchronized by the ICS9248-103. The minimum that the CPU clock is enabled (CLK_STOP# hi...
Description Frequency Generator & Integrated Buffers for PENTIUM/ProTM
Frequency generator and intefrated buffer for Pentium/PRO

File Size 390.58K  /  16 Page

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    Lineage Power
Part No. T8207
OCR Text asychronous transfer mode (atm) interconnect features n 32 multi-phy (mphy) operation n programmable number of utopia output queues with four levels of priority n shared utopia mode n egress sdram buffer support to extend utopia ou...
Description asychronous Transfer Mode (ATM) Interconnect(异步传输模式互连器件)

File Size 104.41K  /  4 Page

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    ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T
OCR Text ...Timing Diagram CLK_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power operation. CLK_STOP# is synchronized by the ICS9248-101. The minimum that the CPU clock is enabled (CLK_STOP# hi...
Description Frequency generator and intefrated buffer for Pentium/PRO and K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 频率发生

File Size 360.74K  /  17 Page

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For asychronous Found Datasheets File :: 122    Search Time::3.25ms    
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