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HA5023IP FMMTA42 2700499 IDT54 J100CA LSC2620 RU16P4M4 24N161D
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    MT8941 MT8941AE MT8941AP

MITEL[Mitel Networks Corporation]
Part No. MT8941 MT8941AE MT8941AP
OCR Text ... Service. The phase sampling is done once in a frame (8 kHz) for each DPLL. The divisions are set at 8 and 193 for DPLL #1, which locks to the falling edge of the input CMOS at 8 kHz to generate T1 (1.544 MHz) clock. For DPLL #2, the di...
Description CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
CMOS ST-BUS FAMILY Advanced T1/CEPT Digital Trunk PLL

File Size 246.12K  /  18 Page

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    MT8952B-1 MT8952BE MT8952BP MT8952BS

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8952B-1 MT8952BE MT8952BP MT8952BS
OCR Text ...rmanently and the comparison is done only on upper seven bits of the received address byte. The 3-64 Interframe Time Fill and Link Channel States When the HDLC Protocol Controller is not sending packets, the transmitter can be in any o...
Description ISO-CMOS ST-BUS FAMILY HDLC Protocol Controller
ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller

File Size 169.67K  /  27 Page

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    MT8952 MT8952B MT8952BC MT8952BS MT8952BE MT8952BP

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8952 MT8952B MT8952BC MT8952BS MT8952BE MT8952BP
OCR Text ...rmanently and the comparison is done only on upper seven bits of the received address byte. The 3-64 Interframe Time Fill and Link Channel States When the HDLC Protocol Controller is not sending packets, the transmitter can be in any o...
Description ISO-CMOS ST-BUS FAMILY HDLC Protocol Controller
ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller

File Size 160.74K  /  22 Page

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    PIC12LC671-04_P PIC12LC671-04_SM PIC12LC671-04I_MF PIC12LC671-04I_P PIC12LC671-04I_SM PIC12LC671T-04_SM PIC12LC671T-04I_

Microchip Technology
Part No. PIC12LC671-04_P PIC12LC671-04_SM PIC12LC671-04I_MF PIC12LC671-04I_P PIC12LC671-04I_SM PIC12LC671T-04_SM PIC12LC671T-04I_SM PIC12LC672-04_P PIC12LC672-04_SM PIC12LC672-04I_MF PIC12LC672-04I_P PIC12LC672-04I_SM PIC12LC672T-04_SM PIC12LC672T-04I_SM PIC12C67 PIC12C671 PIC12C671_JW PIC12C671-04_P PIC12C671-04_SM PIC12C671-04E_P PIC12C671-04E_SM PIC12C671-04I_MF PIC12C671-04I_P PIC12C671-04I_SM PIC12C671-10_P PIC12C671-10_SM PIC12C671-10E_P PIC12C671-10E_SM PIC12C671-10I_MF PIC12C671-10I_P PIC12C671-10I_SM PIC12C671T-04_SM PIC12C671T-04E_SM PIC12C671T-04I_SM PIC12C671T-10_SM PIC12C671T-10E_SM PIC12C671T-10I_SM PIC12C672 PIC12C672_JW PIC12C672-04_P PIC12C672-04_SM PIC12C672-04E_P PIC12C672-04E_SM PIC12C672-04I_MF PIC12C672-04I_P PIC12C672-04I_SM PIC12C672-10_P PIC12C672-10_SM PIC12C672-10E_P PIC12C672-10E_SM PIC12C67X 40175A
OCR Text ... Command No All Locations Done? Yes Verify all Locations @ VDD MIN.* VPP = VIHH2 No Data Correct? Yes Verify all Locations @ VDD MAX. VPP = VIHH2 No Data Correct? Yes Done Begin Programming Command Wait 100 s Report Verify @ ...
Description EPROM Memory Programming Specification
From old datasheet system

File Size 161.94K  /  14 Page

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    SN54LS256 SN54LS256J SN74LS256D SN74LS256N

MOTOROLA[Motorola, Inc]
Part No. SN54LS256 SN54LS256J SN74LS256D SN74LS256N
OCR Text ...ress. Therefore, this should be done only while in the memory mode (E= CL = HIGH). DUAL 4-BIT ADDRESSABLE LATCH LOW POWER SCHOTTKY * * * * * * Serial-to-Parallel Capability Output From Each Storage Bit Available Random (Addressabl...
Description DUAL 4-BIT ADDRESSABLE LATCH

File Size 225.08K  /  6 Page

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    74AHC259 74AHC259D 74AHC259PW 74AHCT259 74AHCT259D 74AHCT259PW HCT259

PHILIPS[Philips Semiconductors]
Part No. 74AHC259 74AHC259D 74AHC259PW 74AHCT259 74AHCT259D 74AHCT259PW HCT259
OCR Text ... Therefore, this should only be done while in the memory mode. The mode select table summarizes the operations of the `259'. 2000 Mar 14 2 Philips Semiconductors Product specification 8-bit addressable latch QUICK REFERENCE ...
Description 8-bit addressable latch

File Size 95.77K  /  20 Page

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    74LS122 SN74LS122 SN74LS122D SN74LS123N SN74LS123D ON2814 SN74LS122N

ONSEMI[ON Semiconductor]
Part No. 74LS122 SN74LS122 SN74LS122D SN74LS123N SN74LS123D ON2814 SN74LS122N
OCR Text ...11, and 12 show how this can be done. Rext remote should be kept as close to the monostable as possible. Retriggering of the part, as shown in Figure 3, must not occur before Cext is discharged or the retrigger pulse will not have any effec...
Description    LOW POWER SCHOTTKY
From old datasheet system

File Size 171.58K  /  12 Page

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    74LS221 SN74LS221N SN74LS221D ON2870 74LS221N SN74LS221

ONSEMI[ON Semiconductor]
Part No. 74LS221 SN74LS221N SN74LS221D ON2870 74LS221N SN74LS221
OCR Text ...xt pin. However, this cannot be done on the LS221. The SN74LS221 is a dual, monolithic, non-retriggerable, high-stability one shot. The output pulse width, tW can be varied over 9 decades of timing by proper selection of the external timing...
Description From old datasheet system
LOW POWER SCHOTTKY

File Size 120.80K  /  8 Page

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    AD654 AD654JN AD654JR AD654JRZ AD654JCHIPS AD654JN/ AD654JR-REEL

ANALOG DEVICES INC
AD[Analog Devices]
Part No. AD654 AD654JN AD654JR AD654JRZ AD654JCHIPS AD654JN/ AD654JR-REEL
OCR Text ...ss otherwise noted. All testing done @ VS = +5 V.) Min 0 0.06 0.20 -10 0.20 0.05 50 AD654JN/JR Typ Max 500 0.1 0.4 +10 0.40 0.10 Units kHz % % % %/V %/V ppm/C 0 -VS 30 5 250 0.5 0.1 0.03 4 (+VS - 4) (+VS - 4) 50 V V nA nA M mV mV/...
Description Low Cost Monolithic Voltage-to-Frequency Converter

File Size 180.60K  /  11 Page

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    AK5352 AK5352-VF AKD5352 AKD5351

AKM[Asahi Kasei Microsystems]
Part No. AK5352 AK5352-VF AKD5352 AKD5351
OCR Text ...e into power-down mode. Must be done once after power-on. Master Clock input pin CMODE="H" : 384fs CMODE="L" : 256fs Serial Data Clock pin Data is clocked out at the falling edge of SCLK. Slave mode: 64fs clock is input usually. Master mode...
Description Sampling 20 bit ADC
96kHz Sampling 20bit ADC
96kHz Sampling ## 20bit ADC

File Size 173.20K  /  19 Page

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