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Hynix Semiconductor, Inc.
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Part No. |
HY5PS2G831CMP-S5 HY5PS2G831CMP-C4 HY5PS2G831CMP-S6
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OCR Text |
...alization sequence, it must be maintained for proper operat ion of the cke receiver. for proper self-refresh entry and exit, v ref must be maintained to this input. cke must be maintained high throughout read and write accesses. input b... |
Description |
256M X 8 DDR DRAM, 0.4 ns, PBGA63 ROHS COMPLIANT, FBGA-63 256M X 8 DDR DRAM, 0.5 ns, PBGA63 ROHS COMPLIANT, FBGA-63
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File Size |
573.70K /
44 Page |
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