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  qdr-ii Datasheet PDF File

For qdr-ii Found Datasheets File :: 340    Search Time::4.656ms    
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    CY7C1150V18-333BZC CY7C1150V18-333BZI CY7C1150V18-333BZXC CY7C1150V18-333BZXI CY7C1150V18-375BZC CY7C1150V18-375BZI CY7C

Cypress Semiconductor
Part No. CY7C1150V18-333BZC CY7C1150V18-333BZI CY7C1150V18-333BZXC CY7C1150V18-333BZXI CY7C1150V18-375BZC CY7C1150V18-375BZI CY7C1150V18-375BZXC CY7C1150V18-375BZXI CY7C1146V18-333BZC CY7C1148V18-333BZC CY7C1157V18-333BZC
OCR Text ... 850 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1.5V + 0.1V. The Cypress QDR devices exceed the QDR consortium spec...II+. The timings for the echo clocks are shown in the "Switching Characteristics" on page 22. Clock ...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 968.15K  /  27 Page

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    CY7C1550V18-300BZC CY7C1550V18-300BZI CY7C1550V18-300BZXC CY7C1550V18-300BZXI CY7C1550V18-333BZC CY7C1550V18-333BZI CY7C

Cypress Semiconductor
Part No. CY7C1550V18-300BZC CY7C1550V18-300BZI CY7C1550V18-300BZXC CY7C1550V18-300BZXI CY7C1550V18-333BZC CY7C1550V18-333BZI CY7C1550V18-333BZXC CY7C1550V18-333BZXI CY7C1550V18-375BZC CY7C1550V18-375BZI CY7C1550V18-375BZXC CY7C1557V18 CY7C1557V18-300BZC
OCR Text ...1100 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1.5V + 0.1V. The Cypress QDR devices exceed the QDR consortium spec...II+. The timing for the echo clocks is shown in "Switching Characteristics" on page 22. Clock Output...
Description 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 954.75K  /  27 Page

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    EP2S90 EP2S130 EP2S15

Altera Corporation
Part No. EP2S90 EP2S130 EP2S15
OCR Text ...RAM, RLDRAM II, quad data rate (QDR) II SRAM, and single data rate (SDR) SDRAM. Stratix II devices support various I/O standards along with support for 1-gigabit per second (Gbps) source synchronous signaling with DPA circuitry. Stratix II ...
Description Stratix II Device Family

File Size 1,179.17K  /  238 Page

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    EP2SGX60C EP2SGX60D EP2SGX60E EP2SGX30C EP2SGX30D EP2SGX90E EP2SGX90F

Altera Corporation
Part No. EP2SGX60C EP2SGX60D EP2SGX60E EP2SGX30C EP2SGX30D EP2SGX90E EP2SGX90F
OCR Text ...mory, including quad data rate (QDR and QDRII) SRAM, double data rate (DDR and DDR2) SDRAM, and single data rate (SDR) SDRAM Altera Corpo...II, XAUI, CEI-6G, CPRI, Serial RapidIO, SONET/SDH Dynamic reconfiguration of transceiver channels t...
Description Stratix II GX Device

File Size 1,917.50K  /  314 Page

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    CY7C1510AV1807

Cypress Semiconductor
Part No. CY7C1510AV1807
OCR Text ...us internally self-timed writes qdr-ii operates with 1.5 cycle read latency when Delay Lock Loop (DLL) is enabled Operates as a QDR-I device with 1 cycle read latency in DLL off mode Available in x 8, x 9, x 18, and x 36 configurations Full...
Description 72-Mbit QDR⑩-II SRAM 2-Word Burst Architecture

File Size 409.38K  /  28 Page

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    CY7C1525KV18-300BZC CY7C1525KV18-300BZI CY7C1525KV18-300BZXC CY7C1525KV18-300BZXI CY7C1525KV18-333BZC CY7C1525KV18-333BZ

Cypress Semiconductor
Part No. CY7C1525KV18-300BZC CY7C1525KV18-300BZI CY7C1525KV18-300BZXC CY7C1525KV18-300BZXI CY7C1525KV18-333BZC CY7C1525KV18-333BZI CY7C1525KV18-333BZXC CY7C1525KV18-333BZXI
OCR Text ...serted HIGH Operates similar to QDR-I Device with 1 Cycle Read Latency when DOFF is asserted LOW Available in x8, x9, x18, and x36 Configura...II architecture. qdr-ii architecture consists of two separate ports: the read port and the write por...
Description 72-Mbit qdr-ii SRAM 2-Word Burst Architecture

File Size 551.37K  /  30 Page

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    CY7C1513KV18 CY7C1513KV18-300BZC CY7C1513KV18-300BZI CY7C1513KV18-300BZXC CY7C1513KV18-300BZXI CY7C1513KV18-333BZC CY7C1

Cypress Semiconductor
Part No. CY7C1513KV18 CY7C1513KV18-300BZC CY7C1513KV18-300BZI CY7C1513KV18-300BZXC CY7C1513KV18-300BZXI CY7C1513KV18-333BZC CY7C1513KV18-333BZI CY7C1513KV18-333BZXC CY7C1513KV18-333BZXI
OCR Text ...serted HIGH Operates similar to QDR-I Device with 1 Cycle Read Latency when DOFF is asserted LOW Available in x8, x9, x18, and x36 Configura...II architecture. qdr-ii architecture consists of two separate ports: the read port and the write por...
Description 72-Mbit qdr-ii SRAM 4-Word Burst Architecture

File Size 566.11K  /  31 Page

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    EP1SGX10C EP1SGX10D

Altera Corporation
Part No. EP1SGX10C EP1SGX10D
OCR Text ...und (ZBT) SRAM, quad data rate (QDR and QDRII) SRAM, double data rate (DDR) SDRAM, DDR fast cycle RAM (FCRAM), and single data rate (SDR) SD...II software can automatically cross reference and place all pins for migration when given a device m...
Description StratixGX FPGA Family

File Size 1,317.59K  /  262 Page

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    IDT70P3537S233RM IDT70P3537S250RM

Integrated Device Technology
Part No. IDT70P3537S233RM IDT70P3537S250RM
OCR Text qdr-iiTM (R) PRELIMINARY DATASHET IDT70P3537 IDT70P3517 Features 18Mb Density (512K x 36) - Also available 9Mb Density (256K x 36) qdr-ii x 36 Burst-of-2 Interface - Commercial: 233MHz, 250MHz Two independent ports - Tr...
Description 512K/256K x36 SYNCHRONOUS DUAL qdr-ii

File Size 864.78K  /  20 Page

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    CY7C1150V18 CY7C1146V18-333BZXC CY7C1146V18-375BZXC CY7C1148V18-333BZXC CY7C1148V18-375BZXC CY7C1157V18-333BZXC CY7C1157

Cypress Semiconductor
Part No. CY7C1150V18 CY7C1146V18-333BZXC CY7C1146V18-375BZXC CY7C1148V18-333BZXC CY7C1148V18-375BZXC CY7C1157V18-333BZXC CY7C1157V18-375BZXC CY7C1146V18-375BZC CY7C1148V18-375BZC CY7C1157V18-375BZC
OCR Text ... 850 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1.5V + 0.1V. The Cypress QDR devices exceed the QDR consortium spec...II+. The timings for the echo clocks are shown in the "Switching Characteristics" on page 22. Clock ...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 973.49K  /  27 Page

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For qdr-ii Found Datasheets File :: 340    Search Time::4.656ms    
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