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SCH1311 92ADW HA124 C143X 298175 SPN15 SMBJ14 2907A
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  rising Datasheet PDF File

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    AIT Components Ltd.
Part No. A7407 A7407E6R A7407E6VR
OCR Text ... 4 38 v input uvlo rising, hysteresis=140mv 3.8 v input ovp rising, hysteresis=1.3v 38 v input supply current v fb =0.85v 0.6 ma input shutdown current 6 a fb feedback vol ta...
Description DC-DC CONVERTER/ BUCK INPUT STANDOFF VOLTAGE STEP-DOWN CONVERTER

File Size 341.90K  /  11 Page

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    DS1302 DS1302N DS1302S DS1302S-16 DS1302SN DS1302SN-16 DS1302Z DS1302ZN

MAXIM - Dallas Semiconductor
Dallas Semiconducotr
DALLAS[Dallas Semiconductor]
Part No. DS1302 DS1302N DS1302S DS1302S-16 DS1302SN DS1302SN-16 DS1302Z DS1302ZN
OCR Text ...of a falling edge followed by a rising edge. For data inputs, data must be valid during the rising edge of the clock and data bits are output on the falling edge of clock. If the RST input is low all data transfer terminates and the I/O pin...
Description 0 TIMER(S), REAL TIME CLOCK, PDSO8
Trickle Charge Timekeeping Chip
0 TIMER(S), REAL TIME CLOCK, PDIP8

File Size 215.68K  /  14 Page

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    AIT Components Ltd.
Part No. A7404E6VR
OCR Text ...nge 4 38 v input uvlo rising, hysteresis=140mv 3.8 0 v input ovp rising, hysteresis=1.3v 38 v input supply current v fb =0.85v 0.6 ma input shutdown current 6 a fb feedback voltage 0.780 0...
Description DC-DC CONVERTER/BUCK STEP-DOWN CONVERTER

File Size 461.68K  /  9 Page

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    HCPL-0710 HCPL-0710500

Agilent (Hewlett-Packard)
HP[Agilent(Hewlett-Packard)]
Part No. HCPL-0710 HCPL-0710500
OCR Text ...sured from the 50% level on the rising edge of the VI signal to the 50% level of the rising edge of the VO signal. 4. Mimimum Pulse Width is the shortest pulse width at which 10% maximum, Pulse Width Distortion can be guaranteed. Maximum Da...
Description 40 ns Prop. Delay, SO-8 Optocoupler

File Size 269.02K  /  16 Page

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    HFA3861B HFA3861BIN HFA3861BIN96

INTERSIL[Intersil Corporation]
Part No. HFA3861B HFA3861BIN HFA3861BIN96
OCR Text ... processor to the HFA3861B. The rising edge of TX_PE will start the internal transmit state machine and the falling edge will initiate shut down of the state machine. TX_PE envelopes the transmit data except for the last bit. The transmitte...
Description Direct Sequence Spread Spectrum Baseband Processor

File Size 695.94K  /  36 Page

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    MAXIM - Dallas Semiconductor
Part No. MAX19693EXWD MAX19693EXW-D
OCR Text ...conversion is triggered on both rising and falling clock edges. the input data rate is 1/4 the dac update rate (1/2 the clock rate). the max19693 provides an lvds data clock output to sim- plify interfacing to fpga or asic devices. the max1...
Description 12-Bit, 4.0Gsps High-Dynamic Performance Wideband DAC

File Size 398.38K  /  24 Page

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    GS8160Z36T-133I

GSI Technology
Part No. GS8160Z36T-133I
OCR Text ...rol inputs are ca ptured on the rising edge of the input clock. burst order control (lbo ) must be tied to a power rail for proper operation. asynchronous inputs include the sleep mode enable (zz) and outp ut enable. output enable can b...
Description 8.5ns 133MHz 512K x 36 18MB pipelined and flow through synchronous NBT SRAM

File Size 563.69K  /  26 Page

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    MAXIM - Dallas Semiconductor
Part No. MAX8895X MAX8895YEWA MAX8895YEWAT
OCR Text ...eshold uok logic-low, v bus_ rising, 100mv hysteresis before initial detection of external device 3.85 4.0 4.15 v uok logic-low, v bus_ falling usb 2.0 low-power device 3.75 3.9 4.05 uok logic-low, v bus_ falling usb 2.0 high-powe...
Description Li-Ion Chargers with Smart Power Selector, Adapter Type Detection, and USB Enumeration

File Size 790.37K  /  45 Page

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    IDT71V632SA4PF IDT71V632SA4PFI IDT71V632 IDT71V632S5PFI IDT71V632S5PF IDT71V632S6PF IDT71V632S6PF8 IDT71V632S6PFG IDT71V

IDT[Integrated Device Technology]
Part No. IDT71V632SA4PF IDT71V632SA4PFI IDT71V632 IDT71V632S5PFI IDT71V632S5PF IDT71V632S6PF IDT71V632S6PF8 IDT71V632S6PFG IDT71V632S6PFG8 IDT71V632S6PFI IDT71V632S6PFI8 IDT71V632S5PF8 IDT71V632S5PFG IDT71V632S5PFG8 IDT71V632S5PFI8 IDT71V632S7PF IDT71V632S7PF8 IDT71V632S7PFG IDT71V632S7PFI IDT71V632S7PFI8 IDT71V632S8PF IDT71V632S8PF8
OCR Text ...ore it is available on the next rising clock edge. If burst mode operation is selected (ADV=LOW), the subsequent three cycles of output data will be available to the user on the next three rising clock edges. The order of these three addres...
Description 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter/ Single Cycle Deselect
3.3V 64K x 32 Pipelined
64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect
64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter Single Cycle Deselect

File Size 271.54K  /  19 Page

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    LT6118HMS8TRPBF LT6118HMS8PBF

Linear Technology
Part No. LT6118HMS8TRPBF LT6118HMS8PBF
OCR Text ...v, v sense = 24mv step, output rising edge v + = 12v to 60v, v sense = 100mv step, output rising edge 500 500 ns ns t settle settling time to 1% v sense = 10mv to 100mv, r out = 2k 2 s downloaded from: http:/// lt6118 4 6118f for m...
Description Current Sense Amplifier, Reference and Comparator with POR

File Size 336.51K  /  24 Page

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