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ST Microelectronics
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Part No. |
M34C02 M34C02-L
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OCR Text |
...se codes are used together with three chip enable inputs (e2, e1, e0) so that up to eight 2 kbit devices may be attached to the i2c bus and ...way. data transfers are terminated by a stop condition after an ack for write, and after a noack for... |
Description |
2 KBIT SERIAL I²C BUS EEPROM FOR DIMM SERIAL PRESENCE DETECT
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File Size |
159.21K /
20 Page |
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it Online |
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Motorola
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Part No. |
MPC755ED MPC755EC
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OCR Text |
...for time-critical operations -- Three-cycle latency, one-cycle throughput, single-precision multiply-add
MOTOROLA
MPC755 RISC Micropro...way set-associative instruction cache (iL1) -- 32K, 32-byte line, eight-way set-associative data cac... |
Description |
RISC Microprocessor Hardware Specifications
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File Size |
1,046.59K /
52 Page |
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it Online |
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Atmel
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Part No. |
TSPC860
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OCR Text |
...860 is functionally composed of three major blocks: ? a 32-bit powerpc core with mmus and caches ? a system interface unit ? a communication...way, set-associative data cache ? 4-kbyte physical address, two-way, set-associative instruction cac... |
Description |
32-bit Integrated PowerQUICC Communications Controller, 66-80 MHz
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File Size |
1,918.61K /
90 Page |
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it Online |
Download Datasheet
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Price and Availability
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