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ISSI
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Part No. |
IS61LF25632 IS61LF25636 IS61LF51218
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OCR Text |
...at are controlled by a positive-edgetriggered single clock input. Write cycles are internally self-timed and are initiated by the rising edge of the clock input. Write cycles can be from one to four bytes wide as controlled by the write con... |
Description |
(IS61LF25632 / IS61LF25636 / IS61LF51218) 256Kx32 Synchronous Flow-through Static RAM
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File Size |
219.30K /
26 Page |
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it Online |
Download Datasheet
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STMicro
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Part No. |
74LVX273
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OCR Text |
...CK
Clock Input (LOW-to-HIGH, edgetriggered) Ground (0V) Positive Supply Voltage
10 20
GND VCC
TRUTH TABLE
INPUTS CL EAR L H H H
X:Don't Care
OUT PUT S CLO CK X Q L L H Qn
F UNCTIO N CLEAR
D X L H X
NO CHANGE
LOG... |
Description |
LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS
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File Size |
71.75K /
10 Page |
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it Online |
Download Datasheet
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Allegro MicroSystems, Inc. ALLEGRO[Allegro MicroSystems]
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Part No. |
A6B273KLW 6B273 A6B273KA
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OCR Text |
...B273KLW combine eight (positive-edgetriggered D-type) data latches and DMOS outputs for systems requiring relatively high load power. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power l... |
Description |
8-BIT LATCHED DMOS POWER DRIVER 8位锁存DMOS功率驱动 KPTC 06 CLASS A 24-61S
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File Size |
128.10K /
12 Page |
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it Online |
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Price and Availability
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