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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0631
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| OCR Text |
...s ? 6 ? 1-167mhz low-power (lp) hcsl dif pairs key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <60ps ? dif...lvds rs rs low-power differential output test load 2pf 2pf 5 inches zo=100ohm note: the device can d... |
| Description |
slew rate for each output
hcsl-compatible differential input
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| File Size |
220.84K /
17 Page |
 View
it Online |
Download Datasheet
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Integrated Device Techn...
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| Part No. |
9DBU0541AKLF 9DBU0541AKILF 9DBU0541AKLFT 9DBU0541-17
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| OCR Text |
...es ? 5 1?167mhz low-power (lp) hcsl dif pairs with z o =100 ? key specifications ? dif additive cycle-to-cycle jitter < 5ps ? dif output...lvds rs rs low-power hcsl differential output test load 2pf 2pf 5 inches zo=100 ? note: the device c... |
| Description |
5-Output 1.5V PCIe Gen1-2-3 Fanout Buffer with Zo=100ohms
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| File Size |
215.11K /
17 Page |
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it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0441
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| OCR Text |
...s ? 4 ? 1-167mhz low-power (lp) hcsl dif pairs w/zo=100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew ...lvds rs rs low-power hcsl differential output test load 2pf 2pf 5 inches zo=100 ? note: the device c... |
| Description |
slew rate for each output
hcsl-compatible differential input
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| File Size |
190.11K /
16 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0431
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| OCR Text |
...s ? 4 ? 1-167mhz low-power (lp) hcsl dif pairs key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <50ps ? dif ...lvds alternate differential output terminations rs zo units 33 100 27 85 ohms rs rs low-power differ... |
| Description |
hcsl-compatible differential input
slew rate for each output
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| File Size |
189.07K /
16 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0241
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| OCR Text |
...s ? 2 ? 1-167mhz low-power (lp) hcsl dif pairs w/z o =100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output ske...lvds rs rs low-power hcsl differential output test load 2pf 2pf 5 inches zo=100 ? note: the device c... |
| Description |
hcsl-compatible differential input
slew rate for each output
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| File Size |
292.60K /
17 Page |
View
it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0231
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| OCR Text |
...s ? 2 ? 1-167mhz low-power (lp) hcsl dif pairs key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <50ps ? dif ...lvds rs rs low-power differential output test load 2pf 2pf 5 inches zo=100 ? note: the device can dr... |
| Description |
slew rate for each output
hcsl compatible differential input
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| File Size |
291.09K /
17 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
5P49V5914 5P49V5914-16
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| OCR Text |
...ential i/os - lvpecl, lvds and hcsl ? input frequency ranges: ? lvcmos reference clock in put (xin/ref) ? 1mhz to 200mhz ? lvds, lvpecl, hcsl differential clock input (clkin, clkinb) ? 1mhz to 350mhz ? crystal frequency range: 8mhz to 40... |
| Description |
Programmable Clock Generator
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| File Size |
438.42K /
37 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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