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ICS
Integrated Circuit Systems
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| Part No. |
ICS85408 ICS85408BG ICS85408BGLF ICS85408BGLFT ICS85408BGT
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| OCR Text |
...wing differential input levels: lvpecl, lvds, LVHSTL, SSTL, HCSL * Maximum output frequency: 700MHz * Translates any differential input signal (lvpecl, LVHSTL, SSTL, HCSL) to lvds levels without external bias networks * Translates any singl... |
| Description |
Low Skew, 1-to-8, Differential-to-lvds Fanout Buffer
LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-lvds CLOCK DISTRIBUTION CHIP
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| File Size |
168.14K /
12 Page |
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ON Semiconductor
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| Part No. |
NB4N527S
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| OCR Text |
...ting anylevel tm input signal (lvpecl, cml, hstl, lvds, or lvttl/lvcmos) to lvds. depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signa... |
| Description |
3.3V, 2.5Gb/s Dual AnyLevel to lvds Receiver/Driver/Buffer/Translator with Internal Input Termination(带内部输入终端的3.3V, 2.5Gb/sAnyLevel到lvds接收驱动缓冲译码
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| File Size |
112.11K /
10 Page |
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it Online |
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ICS
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| Part No. |
M2006-04
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| OCR Text |
... reference inputs support lvds, lvpecl, as well as single-ended LVCMOS, LVTTL Power-up frequency translation ratio of x32 useful for 19.44MHz input and 155.52 or 622.08MHz output Single 3.3V power supply Small 9 x 9 mm SMT (surface mount... |
| Description |
VCSO Frequency Translator
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| File Size |
300.56K /
12 Page |
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it Online |
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ICS
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| Part No. |
M2006-11 M2006-21 M2006-11-622.0800
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| OCR Text |
... reference inputs support lvds, lvpecl, as well as single-ended LVCMOS, LVTTL
Figure 1: Pin Assignment
Example Input / Output Frequency Combinations
Input Clock VCSO Output (MHz) Freq1 (MHz) Freq (MHz) 19.44 19.53125 622.08 625.00 62... |
| Description |
PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36
SAW PLL for Frequency Translation with Add/Drop feature and Hitless Switching option
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| File Size |
312.67K /
14 Page |
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it Online |
Download Datasheet |
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Price and Availability
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