| |
|
 |
Motorola
|
| Part No. |
MPC930
|
| OCR Text |
...ator inputs with a differential pecl reference clock input that allows the device to be used in mixed technology clock distribution trees. A...lvcmos or LVTTL compatible levels while the outputs provide lvcmos levels with the capability to dri... |
| Description |
Low Voltage PLL Clock Drlver
|
| File Size |
158.51K /
14 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Motorola
|
| Part No. |
MPC9449
|
| OCR Text |
pecl/lvcmos Clock Fanout Buffer
The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device me... |
| Description |
3.3V/2.5V 1:15 pecl/lvcmos Clock Fanout Buffer
|
| File Size |
159.18K /
12 Page |
View
it Online |
Download Datasheet |
| |
|
|
Motorola
|
| Part No. |
MPC993
|
| OCR Text |
...-Lead Pinout (Top View)
3.3V pecl DC Characteristics (TA = -40C to 85C, VCC = 3.3V 5%)
Symbol VOH VOL VPP VCMR VOH VOL VIH VIL IIL IEE ...lvcmos Outputs) Output LOW Voltage (lvcmos Outputs) Input HIGH Voltage (lvcmos Inputs) Input LOW Vol... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
|
| File Size |
93.21K /
8 Page |
View
it Online |
Download Datasheet |
| |
|
|
Motorola
|
| Part No. |
MPC9990
|
| OCR Text |
...70C
LOW VOLTAGE DIFFERENTIAL pecl-HSTL PLL CLOCK DRIVER
FA SUFFIX 48-LEAD LQFP PACKAGE CASE 932
The MPC9990 provides output clock f...lvcmos lvcmos lvcmos lvcmos lvcmos lvcmos Power supply Power supply Power supply Ground Internal res... |
| Description |
Low Voltage PLL Clock Drlver
From old datasheet system
|
| File Size |
199.86K /
12 Page |
View
it Online |
Download Datasheet |
| |
|
|
Motorola, Inc.
|
| Part No. |
MPC9992
|
| OCR Text |
pecl PLL Clock Generator
The MPC9992 is a 3.3 V compatible, PLL based pecl clock driver. Using SiGe technology and a fully differential des...lvcmos compatible. Features
MPC9992
3.3V DIFFERENTIAL ECL/pecl PLL CLOCK GENERATOR
* 7 diff... |
| Description |
3.3V Differential ECL/pecl PLL Clock Generator
From old datasheet system
3.3 DIFFRERENTIAL ECL/pecl PLL CLOCK GENERATOR
|
| File Size |
129.71K /
12 Page |
View
it Online |
Download Datasheet |
| |
|
|
Motorola
|
| Part No. |
MPC9993
|
| OCR Text |
... the clock switch excursion. 5. pecl output termination is 50 ohms to VCC - 2.0V.
MOTOROLA
4
TIMING SOLUTIONS
MPC9993
APPLICATIONS INFORMATION
The MPC9993 is a dual clock PLL with on-chip Intelligent Dynamic Clock Switch (IDCS... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
|
| File Size |
109.55K /
8 Page |
View
it Online |
Download Datasheet |
| |
|
|
ONSEMI[ON Semiconductor]
|
| Part No. |
NB6L11 NB6L11DTR2 NB6L11D NB6L11DR2 NB6L11DT
|
| OCR Text |
...75 ps Typical Rise/Fall Times * pecl Mode Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V * NECL Mode Operating Range: VCC = 0 V wi...lvcmos, LVTTL Input LVDS, CML, LVpecl, LVNECL, lvcmos, LVTTL Input - - - - - - HIGH
7
D
LOW... |
| Description |
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVpecl/LVNECL 1:2 CLOCK OR DATA FANOUT BUFFER / TRANSLATOR 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
6GHz 2.5V/3.3V Multilevel Input to Differential LVNECL/LVpecl 1:2 Clock or Data Fanout Buffer/Transl
From old datasheet system
|
| File Size |
112.11K /
12 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
