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IDT
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| Part No. |
IDT5T93GL06
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| OCR Text |
...gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the possibility of runt pulses or be able to tolerate them in down stream circuitry. 3. It is reco... |
| Description |
2.5V LVDS 1:6 Glitchless Clock Buffer Terabuffer II
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| File Size |
109.79K /
16 Page |
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Download Datasheet
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Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
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| Part No. |
SY100S834 SY100S834L SY100S834Z SY100S834ZC SY100S834ZITR SY100S834LZITR SY100S834LZC SY100S834LZCTR SY100S834LZI SY100S834ZI SY100S834ZCTR
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| OCR Text |
...oids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider ... |
| Description |
RELAY, DPDT, 1A, 5VDC
(±1, ±2, ±4) OR (±2, ±4, ±8) CLOCK GENERATION CHIP
(1 2 4) OR (2 4 8) CLOCK GENERATION CHIP
(÷1, ÷2, ÷4) OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP
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| File Size |
66.89K /
4 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
IMIZ9975 IMIZ9975CA Z9975CA
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| OCR Text |
...ods will: a. contain short or ?runt? clock periods. these are clock cycles in which the cycle(s) are shorter in period than either the old or new frequency that is being transitioned to. b. contain stretched clock periods. these are clock... |
| Description |
3.3V, 150MHz, Multi-Output Zero Delay Buffer
Clocks and Buffers : Clock Distribution
Clocks and Buffers 时钟和缓冲器
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| File Size |
61.47K /
8 Page |
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it Online |
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IDT
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| Part No. |
MPC9447
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| OCR Text |
...gic low state eliminates output runt pulses ? high--impedance output control ? 3.3v or 2.5v power supply ? drives up to 18 series terminated clock lines ? ambient temperature range --40 _ cto+85 _ c ? 32 lead lqfp packaging ? supports clock... |
| Description |
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer
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| File Size |
414.78K /
9 Page |
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it Online |
Download Datasheet |
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Motorola
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| Part No. |
MPC9331
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| OCR Text |
... in logic low eliminates output runt pulses
Pin and function compatible to the MPC931 Functional Description The MPC9331 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9331... |
| Description |
3.3V 1:6 VLCMOS PLL Clock Generator
From old datasheet system
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| File Size |
176.26K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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