| |
|
 |
pmc
|
| Part No. |
2001654
|
| OCR Text |
...it directions to support either single-rail or dual-rail data. The links can also be configured to sample or update on the falling or rising edge of the clock. When in single-rail mode, the transmit negative data pins (TDN) are ignored and ... |
| Description |
From old datasheet system
|
| File Size |
523.65K /
22 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
INTERSIL[Intersil Corporation]
|
| Part No. |
HCTS540MS HCTS540 HCTS540D HCTS540DMSR HCTS540HMSR HCTS540K HCTS540KMSR
|
| OCR Text |
...ET No Upsets: >100 MEV-cm2/mg * single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) * Dose Rate Survivability: >1 x * Dose Rate Upset >10
10
1012
RAD (Si)/s
RAD (Si)/s 20ns Pulse
A3 A4 A5 A6 A7
* Latch-Up Free... |
| Description |
Radiation Hardened Inverting octal Buffer/Line Driver, Three-State
Quadruple 2-Input Positive-NOR Gates 20-LCCC -55 to 125
|
| File Size |
134.61K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
IDT82V2048 IDT82V2048_DS_96859
|
| OCR Text |
...coaxial applications Selectable single rail or dual rail mode and AMI or HDB3/B8ZS line encoder/decoder Built-in transmit pre-equalization meets G.703 & T1.102 Selectable transmit/receive jitter attenuator meets ETSI CTR12/ 13, ITU G.736, G... |
| Description |
octal E1 Short Haul LINE INTERFACE UNIT
From old datasheet system
|
| File Size |
670.13K /
61 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
IDT82V2058 IDT82V2058_DS_28648
|
| OCR Text |
...coaxial applications Selectable single rail or dual rail mode and AMI or HDB3 line encoder/decoder Built-in transmit pre-equalization meets G.703 Selectable transmit/receive jitter attenuator meets ETSI CTR12/13, ITU G.736, G.742 and G.823 ... |
| Description |
octal T1/E1 Short Haul LINE INTERFACE UNIT
From old datasheet system
|
| File Size |
605.51K /
52 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
IDT74ALVCH245 IDT74ALVCH245_DS_19139
|
| OCR Text |
...ned to operate this device in a single-byte mode. All inputs are designed with hysteresis for improved noise margin. The ALVCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the... |
| Description |
3.3V CMOS octal BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
From old datasheet system
|
| File Size |
61.07K /
6 Page |
View
it Online |
Download Datasheet |
| |
|
|
Zarlink
|
| Part No. |
MT90503 161
|
| OCR Text |
... Master clock rate up to 80 MHz single power supply device (3.3V) IEEE 1149 (JTAG) interface
Control Memory (external SSRAM)
Address b...dual fibre ring applications. Figure 3 shows the data flow from the H.100/H.110 bus to the TX UTOPIA... |
| Description |
2048VC AAL1 SAR
From old datasheet system
|
| File Size |
1,521.61K /
232 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
