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divider fanout Datasheet PDF File

For divider fanout Found Datasheets File :: 344 Search Time::2.031ms
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				Freescale Semiconductor, Inc Freescale Semiconductor...
Part No.	MPC9446
OCR Text	...y by one or two. t he frequency divider can be set individually for each of the th ree output banks. the mpc9446 can be rese,t and the outp...fanout of 1:20. the dev ice is packaged in a 7x7 mm 2 32-lead lqfp package. fa suffix 32-lead lqfp ...
Description	2.5 V and 3.3 V LVCMOS Clock fanout Buffer
File Size	315.97K / 12 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89538L SY89538LHGTR SY89538LHG
OCR Text	...t pre-scalar and Zero Delay MUX divider select inputs. The two-bit input pre-scalar divides the input reference frequency by /1, /2, /4, or ...fanout buffer with zero delay is part of a precision PLL-based clock generation family optimized for...
Description	3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and fanout Buffer with Zero Delay
File Size	625.66K / 23 Page	View it Online	Download Datasheet

				PulseCore Semiconductor
Part No.	ASM2I99456 ASM2I99456G-32-ER ASM2I99456G-32-ET ASM2I99456G-32-LR ASM2I99456G-32-LT
OCR Text	...cy by one or two. The frequency divider can be set individually for each of the three output banks. The ASM2I99456 can be reset and the outp...fanout of 1:20. The device is packaged in a 7x7 mm2 32-lead LQFP and TQFP Packages. Functional De...
Description	3.3V/2.5V LVCMOS Clock fanout Buffer
File Size	552.33K / 14 Page	View it Online	Download Datasheet

				Motorola
Part No.	MPC9449
OCR Text	...uts Selectable output frequency divider (divide-by-one and divide-by-two) Maximum clock frequency of 200 MHz Maximum clock skew of 200 ps Hi...fanout BUFFER Supports clock distribution in networking, telecommunication and FA SUFFIX computin...
Description	3.3V/2.5V 1:15 PECL/LVCMOS Clock fanout Buffer
File Size	159.18K / 12 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	MPC9446
OCR Text	...cy by one or two. The frequency divider can be set individually for each of the three output banks. The MPC9446 can be rese,t and the output...fanout of 1:20. The device is packaged in a 7x7 mm2 32-lead LQFP package. IDTTM / ICSTM LVCMOS CL...
Description	3.3V AND 2.5V, LVCMOS CLOCK fanout BUFFER
File Size	696.06K / 11 Page	View it Online	Download Datasheet

				Freescale Semiconductor, Inc MOTOROLA[Motorola Inc] Motorola, Inc
Part No.	MPC9600 MPC9600FA
OCR Text	...e feedback input FB_IN. The QFB divider ratio is configurable and determines the PLL frequency multiplication factor when QFB is directly co...fanout buffers for the inner branches of the clock distribution tree. All control inputs accept LVCM...
Description	LOW VOLTAGE 2.5V AND 3.3 V CMOS PLL CLOCK DRIVER LOW VOLTAGE 2.5 V AND 3.3 V CMOS PLL CLOCK DRIVER
File Size	320.52K / 16 Page	View it Online	Download Datasheet

				http:// ICST[Integrated Circuit Systems]
Part No.	ICS84314AYT ICS84314AY ICS84314 ICS84314AYLF ICS84314AYLFT
OCR Text	...are programmable and the output divider is hard-wired for divide by 2 thus providing a frequency range of 125MHz to 350MHz. In serial progra...fanout BUFFER nP_LOAD input is initially LOW. The data on inputs M0 through M8 is passed directly t...
Description	350MHZ, CRYSTAL-TO-3.3V/2.5V LVPECL FREQUENCY SYNTHESIZER W/fanout BUFFER From old datasheet system 350MHZ CRYSTAL-TO-3.3V/2.5V LVPECL FREQUENCY SYNTHESIZER W/fanout BUFFER
File Size	209.12K / 18 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89537LMGTR SY89537LMG SY89537L
OCR Text	...e LSB bit. See "Reference Input divider Select Table," for proper decoding. The threshold voltage VTH = VCC/2. Internal 25k pull-up. TTL/CMO...fanout buffer is part of a precision PLL-based clock generation family optimized for internal system...
Description	3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and fanout Buffer
File Size	811.52K / 19 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89538L06 SY89538LHGTR SY89538L SY89538LHG
OCR Text	...t pre-scalar and Zero Delay MUX divider select inputs. The two-bit input pre-scalar divides the input reference frequency by /1, /2, /4, or ...fanout buffer with zero delay is part of a precision PLL-based clock generation family optimized for...
Description	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and fanout Buffer with Zero Delay
File Size	627.79K / 23 Page	View it Online	Download Datasheet

				Micrel Semiconductor
Part No.	SY100E222LTYTR SY100E222LTYTX SY100E222L11
OCR Text	...lect. the internal programmable divider for each of the four banks generates a 1 or 2 frequency of the selected input. the 1/ 2 divid...fanout configuration. each of the four banks can independently select the 1 or 2 output frequenc...
Description	3.3V, 1.5GHz ÷1/÷2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK
File Size	84.81K / 7 Page	View it Online	Download Datasheet

For divider fanout Found Datasheets File :: 344 Search Time::2.031ms
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